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6530 PDF даташит

Спецификация 6530 изготовлена ​​​​«Commodore» и имеет функцию, называемую «MEMORY / TIMER ARRAY».

Детали детали

Номер произв 6530
Описание MEMORY / TIMER ARRAY
Производители Commodore
логотип Commodore логотип 

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6530 Даташит, Описание, Даташиты
,..,commodore
~ semiconductor group
~~@~
MPS
6530
MEMORY,
I/O, TIMER
ARRAY
6530 (MEMORY, I/O, TIMER ARRAY)
DESCRIPTION
The 6530 is designed to operate in conjunction with the 650X Microprocessor Family. It is
comprised of a mask programmable 1024 x8 ROM,a 64x8 static RAM, two software controlled 8bit
bi-directional data ports allowing direct interfacing between the microprocessor unit and peripheral
devices, and a software programmable interval timer with interrupt, capable of timing in various
intervals from 1 to 262,144 clock periods.
FEATURES
• 8 bit bi-directional Data Bus for direct communication with the microprocessor
• 1024 x 8 ROM
• 64 x 8 static RAM
• Two 8 bit bi-directional data ports for interface to peripherals
• Two programmable I/O Peripheral Data Direction Registers
• Programmable Interval Timer
• Programmable Interval Timer Interrupt
• TTL & CMOS compatible peripheral lines
• Peripheral pins with Direct Transistor Drive Capability
• High Impedance Three-State Data Pins
• Allows up to 7K contiguous bytes of ROM with no external decoding
Figure 1. 6530 Block Diagram
DATA
CONTROL
'REGISTER
A
I/O
REGISTER
A
PA7
INTERVAL
TIMER
PERIPHERAL
DATA BUFFER
B
I/O
REGISTER
B
DATA
BUS
BUFFER
DO 01
ADDRESS
DECODER
AO A9
CHIP
SELECT
R/W
64 x 8
RAM
CS1 CS2 ¢2 R/W RES
2-96









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6530 Даташит, Описание, Даташиты
MPS
6530
MAXIMUM RATINGS
Supply Voltage, Vcc
Input/Output Voltage, VIN
Operating Temperature, TOp
Storage Temperature, TSTG
-0.3V to +7.0V
-0.3V to +7.0V
OCto 70 C
-55 C to 150 C
All inputs contain protection circuitry to prevent damage due
to high static discharges. Care should be exercised to
prevent unnecessary application of voltages in excess of the
allowable limits.
COMMENT
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those indi-
cated in the operational sections of this specification is not
implied and exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (VCC=5.0v±5%, VSS=Ov, TA=25° C)
CHARACTERISTIC
SYMBOL MIN.
Input High Voltage
Input Low Voltage
VIH VSS+2.4
VIL VSS-·3
Input Leakage Current; VI N=VSS+5v
AO-A9, RS, R/W, RES, ~2, PB6*, PB5*
liN
Input Leakage Current for High Impedance State
(Three State); VI N=.4v to 2.4v; 00-07
ITSI
Input High Current; VIN=2.4v
PAO-PA7, PBO-PB7
IIH -100.
Input Low Current; VIN=.4v
PAO-PA7, PBO-PB7
IlL
Output High Voltage
VCC=MIN, ILOAD ~ -100JjA(PAO-PA7,PBO-PB7,DO-D7)
ILOAD ~ -3 MA (PAO-PBO)
VOH
VSS+2.4
VSS+1.5
Output Low Voltage
VCC=MIN, ILOAD ~ 1.6MA
VOL
Output High Current (Sourcing);
VOH ~ 2Av (PAO-PA7,PBO-PB7,DO-D7)
~ 1.5v Available for other than TIL
(Darlingtons) (PAO,PBO)
IOH
-100
-3.0
Output Low Current (Sinking); VOL ~ Av (PAO-PA7)
(PBO-PB7)
IOL 1.6
Clock Input Capacitance
Input Capacitance
Output Capacitance
Power Dissipation
CClk
CIN
COUT
Po
TYP.
1.0
±1.0
-300.
-1.0
-1000
-5.0
500
MAX.
VCC
VSS+.4
2.5
-_.-
±10.0
-1.6
VSS+.4
30
10
10
1000
*When programmed as address pins. All values are D.C. readings.
UNIT
V
V
)JA
fA
--
fJA
MA
V
--
V
uA
MA
--
MA
pF
pF
pF
MW
I
2-97









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6530 Даташит, Описание, Даташиты
MPS
6530
WRITE TIMING CHARACTERISTICS
CHARACTERISTIC
SYMBOL MIN.
TYP.
Clock Period
Rise & Fall Times
TCYC
TR, TF
1
Clock Pulse Width
TC 470
R/W valid before positive transition of clock
TWCW
180
Address valid before positive transition of clock TACW
180
Data Bus valid before negative transition of clock TDCW
300
Data Bus Hold Time
THW
10
Peripheral data valid after negative transition
of clock
TCPW
Peripheral data valid after negative transition
of clock driving CMOS (Level=VCC-30%)
TCMOS
READ TIMING CHARACTERISTICS
CHARACTERISTIC
SYMBOL MIN.
TYP.
R/W valid before positive transition of clock
TWCR
180
Address valid before positive transition of clock TACR
180
Peripheral data valid before positive transition
of clock
TPCR
300
Data Bus valid after positive transition of clock TCDR
Data Bus Hold Time
-
IRQ (Interval Timer Interrupt) valid before
positive transition of clock
THR
TIC
Loading= 30 pF + 1 TIL load for PAO-PA7, PBO-PB7
=130 pF + 1 TIL load for 00-07
10
200
MAX.
10
25
1
2
MAX.
395
UNIT
;US
NS
NS
NS
NS
NS
NS
;US
fJS
UNIT
NS
NS
NS
NS
NS
NS
2-98










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