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Número de pieza | 6508 | |
Descripción | MICROPROCESSOR | |
Fabricantes | Commodore | |
Logotipo | ||
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MPS
'6508
~~@~
MICROPROCESSOR
WITH RAM
AND I/O
II[ 6508 MICROPROCESSOR WITH RAM AND 1/0
DESCRIPTION
The 6508 is a low-cost microcomputer system capable of solving a broad range of small-systems
and peripheral-control problems at minimum cost to the user.
,J\
One full page (2~6 bytes) of RAM is I~cated .(on chip) ~~ncurrently at Page a and ~a~ 1, allowing
Zero Page Addressing and stack operations With no additional RAM.
""",,,., """",.j \
An 8-bit Bi-Directional 1/0 Port is located on-chip with the Output Register at .,. ti~re&&:Q, a'o.~ and the
Data-Direction Register at Address 0 a a a. The 110 Port is bit-by-bit prog~~ ~I~,. ,"""''''' I)
The Three-State sixteen-bit Address Bus allows Direct Memory A{c\,.~ .\lfo'Mf.) and multi-
processor systems sharing a common memory.
''\",\,\\,i,/l''''''''''''',\,,,,,,~:'7
The internal processor architecture is identical to the MOS TeG~·n"e:l'tGg~.
provide software
compatibility.
'\ .
FEATURES OF THE 6508 ...
• 8-Bit Bi-Directional 1/0 Port
• 256 Bytes fully Static RAM (internal)
• Single + 5 volt supply
• N channel, silicon gate, deple
• Eight bit parallel processin
• 56 Instructions
• Decimal and binary ar)
• Thirteen addressing m
• True indexing ca
• Programmable
• Variable len t
• Interrupt
• 8 Bit B' i~C
us
• Addres ' b "Ai . ory nge of up to 65K bytes
• Direct me
ccess capability
• Bus compatl . ith M680a
• Pipeline archit ture
• 1 MHz, 2MHz (Suffix "A'), and 3MHz (Suffix "B")
• Use with any type or speed memory
2-25
PIN CONFIGURATION
RES
01 1N
iRa
AEC
Vee
A.
A,
A,
A,
A.
A.
A.
A,
A.
A,
AIO
A"
A"
A"
vss
4
5
8
9
10
11
12
13
14
15
16
17
18
19
20
6508
40 liI2 1N
39 RfW
38 DB.
37 DB,
36 DB,
35 DB,
34 DB.
33 DB.
32 DB.
31 DB,
30 Po
29 p,
28 P,
27 p,
26 P.
25 P.
24 P.
23 P,
22 A"
21 Au
1 page I
I
I
13, (in) _ _ _ _..I O.2V
r----1 TO I
VCC -O.2V I
0,(in)
I
I
I
CLOCK TIMING
MPS
6508
- - - - - - - TCYC -------------~
PWH0t----~
VCC-O.2V
I
R/W
ADDRESS ______-+_ _ _ _ _ _ _"\
FROM
MPU
O.BV
2.0V
O.BV
DATA
TO
MEMORY
PERIPHERAL
DATA
Xt""'CC-'"
ADDRESS
ENABLE
CONTROL
------------------
' - - - - - T p D W ----I~
TIMING FOR WRITING DATA TO
MEMORY OR PERIPHERALS
2-29
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet 6508.PDF ] |
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