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PDF ADNK-3080 Data sheet ( Hoja de datos )
| Número de pieza | ADNK-3080 | |
| Descripción | High-Performance Optical Mouse Sensor | |
| Fabricantes | AVAGO | |
| Logotipo |  |
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ADNS - 3080
High-Performance Optical Mouse Sensor
Data Sheet
Description
The ADNS-3080 is a high performance addition to Avago
Technologies’ popular ADNS family of optical mouse
sensors.
The ADNS-3080 is based on a new, faster architecture with
improved navigation. The sensor is capable of sensing high
speed mouse motion - up to 40 inches per second and
acceleration up to 15g – for increased user precision and
smoothness.
The ADNS-3080 along with the ADNS-2120 (or ADNS-2120-
001) lens, ADNS-2220 (or ADNS-2220-001) assembly clip and
HLMP-ED80-XX000 form a complete, compact optical mouse
tracking system. There are no moving parts, which means
high reliability and less maintenance for the end user. In
addition, precision optical alignment is not required, facilitat-
ing high volume assembly.
The sensor is programmed via registers through a four-wire
serial port. It is packaged in a 20-pin staggered dual inline
package (DIP).
Theory of Operation
The ADNS-3080 is based on Optical Navigation Technol-
ogy, which measures changes in position by optically
acquiring sequential surface images (frames) and math-
ematically determining the direction and magnitude of
movement.
It contains an Image Acquisition System (IAS), a Digital
Signal Processor (DSP), and a four-wire serial port.
The IAS acquires microscopic surface images via the lens
and illumination system. These images are processed
by the DSP to determine the direction and distance of
motion. The DSP calculates the ∆x and ∆y relative dis-
placement values.
An external microcontroller reads the ∆x and ∆y informa-
tion from the sensor serial port. The microcontroller then
translates the data into PS2 or USB signals before sending
them to the host PC or game console.
Features
• High speed motion detection – up to 40 ips and 15g
• New architecture for greatly improved optical
navigation technology
• Programmable frame rate over 6400 frames per
second
• SmartSpeed self-adjusting frame rate for optimum
performance
• Serial port burst mode for fast data transfer
• 400 or 1600 cpi selectable resolution
• Single 3.3 volt power supply
• Four-wire serial port along with Chip Select, Power
Down, and Reset pins
Applications
• Mice for game consoles and computer games
• Mice for desktop PC’s, Workstations, and portable
PC’s
• Trackballs
• Integrated input devices
1 page  
Figure 4. 2D Assembly drawing of ADNS-3080 (top and side view)
NOTE: These new Avago Technologies optical mouse sensors, lenses and clips have different physical configurations
that require a different PCB mounting method to optimize the navigation performance.
Refer Application Notes AN 5035 for further information.
5 Page 
AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, VDD3=3.3V, fclk=24MHz.
Parameter
Symbol Min. Typical Max. Units Notes
VDD to RESET
Data delay
after RESET
tOP
tPU-RESET
250 ms
35 ms
From VDD = 3.0V to RESET sampled
From RESET falling edge to valid motion data at
2000 fps and shutter bound 8290.
Input delay
after reset
TIN-RST
500 ms
From RESET falling edge to inputs active (NPD,
MOSI, NCS, SCLK)
Power Down
tPD
2.1 ms From NPD falling edge to initiate the power down
cycle at 500fps (tpd = 1 frame period + 100ms )
Wake from NPD
tPUPD
75 ms From NPD rising edge to valid motion data at
2000 fps and shutter bound 8290. Max assumes
surface change while NPD is low.
Data delay
after NPD
tCOMPUTE
3.1 ms From NPD rising edge to all registers contain data
from new images at 2000fps (see Figure 10) .
RESET pulse width tPW-RESET 10
ms
MISO rise time
MISO fall time
MISO delay
afterSCLK
tr-MISO
tf-MISO
tDLY-MISO
40
200 ns
CL = 50pF
40
200 ns
CL = 50pF
120 ns
From SCLK falling edge to MISO data valid, no
load conditions
MISO hold time
MOSI hold time
thold-MISO
thold-MOSI
250
200
ns Data held until next falling SCLK edge
ns Amount of time data is valid after SCLK rising
edge
MOSI setup time
SPI time between
write commands
tsetup-MOSI
tSWW
120
50
ns From data valid to SCLK rising edge
ms From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second data byte.
SPI time between
write and read
commands
tSWR
50
ms From rising SCLK for last bit of the first data byte,
to rising SCLK for last bit of the second address
byte.
SPI time between
tSRW
read and subsequent tSRR
commands
250
ns From rising SCLK for last bit of the first data byte,
to falling SCLK for first bit of the second address
byte.
SPI read
address-data
delay
tSRAD
50
ms From rising SCLK for last bit of the address byte,
to falling SCLK for first bit of data being read. All
registers except Motion & Motion_Burst
SPI motion read
address-data
delay
tSRAD-MOT 75
ms From rising SCLK for last bit of the address byte, to
falling SCLK for first bit of data being read. Applies
to 0x02 Motion, and 0x50 Motion_Burst, registers
NCS to SCLK active tNCS-SCLK
SCLK to NCS inactive tSCLK-NCS
120
120
ns From NCS falling edge to first SCLK rising edge
ns From last SCLK falling edge to NCS rising edge,
for valid MISO data transfer
NCS to MISO high-Z
SROM download and
frame capture
byte-to-byte delay
tNCS-MISO
tLOAD
10
250 ns
ms
From NCS rising edge to MISO high-Z state
(see Figure 23 and 24)
NCS to burst mode
exit
tBEXIT
4
ms Time NCS must be held high to exit burst mode
Transient Supply
Current
IDDT
85 mA Max supply current during a VDD3 ramp from 0 to
3.6V
11
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