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C8051F962 PDF даташит

Спецификация C8051F962 изготовлена ​​​​«Silicon Laboratories» и имеет функцию, называемую «Ultra Low Power 128K LCD MCU».

Детали детали

Номер произв C8051F962
Описание Ultra Low Power 128K LCD MCU
Производители Silicon Laboratories
логотип Silicon Laboratories логотип 

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C8051F962 Даташит, Описание, Даташиты
C8051F96x
Ultra Low Power 128K, LCD MCU Family
Ultra Low Power Consumption at 3.6 V
- 130 µA/MHz Low-Power Active mode with dc-dc
enabled
- 120 nA sleep current w/ data retention; POR monitor
enabled
- 450 nA sleep mode with SmaRTClock
(internal LFO)
- 600 nA sleep mode with SmaRTClock (ext. crystal)
- 2 µs wakeup time; 1.5 µA analog settling time
12-Bit; 16 Ch. Analog-to-Digital Converter
- Up to 75 ksps (12-bit mode) or 300 ksps
(10-bit mode)
- External pin or internal VREF (no ext cap required)
- On-chip voltage reference; 0.5x gain allows measur-
ing voltages up to twice the reference voltage
- Autonomous burst mode with 16-bit auto-averaging
accumulator
- Integrated temperature sensor
Two Low Current Comparators
- Programmable hysteresis and response time
- Configurable as wake-up or reset source
Internal 6-Bit Current Reference
- Up to ±500 µA; source and sink capability
- Enhanced resolution via PWM interpolation
Integrated LCD Controller
- Supports up to 128 segments (32x4)
- LCD controller consumes only 400 nA for
32-segment static display
- Integrated charge pump for contrast control
Metering-Specific Peripherals
- DC-DC buck converter allows dynamic voltage
scaling for maximum efficiency (250 mW output)
- Sleep-mode pulse accumulator with programmable
switch, de-bounce and pull-up control; interfaces
directly to metering sensor
- Data Packet Processing Engine (DPPE) includes
hardware AES, DMA, CRC and encoding blocks for
acceleration of wireless protocols
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
Memory
- Up to 128 kB Flash; In-system programmable; Full
read/write/erase functionality over supply range
- Up to 8 kB internal data RAM
Digital Peripherals
- 57 or 34 port I/O; All 5 V tolerant with high sink
current and programmable drive strength
- Hardware SMBus™ (I2C™ Compatible), 2 x SPI™,
and UART serial ports available concurrently
- Four general purpose 16-bit counter/timers
- Programmable 16-bit counter/timer array with six
capture/compare modules and watchdog timer
Clock Sources
- Precision Internal oscillator: 24.5 MHz, 2% accuracy
supports UART operation; spread-spectrum mode
for reduced EMI
- Low power internal oscillator: 20 MHz
- External oscillator: Crystal, RC, C, or CMOS Clock
- SmaRTClock oscillator: 32 kHz Crystal or 16.4 kHz
internal LFO
On-Chip Debug
- On-chip debug circuitry facilitates full-speed, non-
intrusive in-system debug (no emulator required)
- Provides 4 breakpoints, single stepping
Packages
- 76-pin DQFN (6 x 6 mm)
- 40-pin QFN (6 x 6 mm)
- 80-pin TQFP (12 x 12 mm)
Temperature Range: –40 to +85 °C
C2CK/RST
VBAT
VDC
VBATDC
IND
GNDDC
CAP
GND
Power On
Reset/PMU
Wake
Reset
Debug /
Programming
Hardware
CIP-51 8051
Controller Core
128k Byte ISP Flash
Program Memory
256 Byte SRAM
8092 Byte XRAM
C2D
VBAT
VDD
VREG
Analog
Power
Digital
Power
DC/DC Buck
Converter
Precision
24.5 MHz
Oscillator
DMA
CRC
Engine
AES
Engine
Encoder
SYSCLK
LCD Charge
Pump
Low Power
20 MHz
Oscillator
XTAL1
XTAL2
External
Oscillator
Circuit
XTAL3
XTAL4
Enhanced
smaRTClock
Oscillator
System Clock
Configuration
SFR
Bus
Port I/O Configuration
Digital Peripherals
UART
Timers
0, 1, 2, 3
PCA/WDT
SMBus
Priority
Crossbar
Decoder
SPI 0
SPI 1
(DMA Enabled)
Crossbar Control
LCD (up to 4x32)
EMIF
Pulse Counter
Analog Peripherals
Internal External
VREF VREF
12-bit
75ksps
ADC
A
M
U
X
VDD
VREF
Temp
Sensor
GND
CP0, CP0A +
-
CP1, CP1A +
-
Comparators
Port 0
Drivers
Port 1
Drivers
Port 2
Drivers
P3-6
Drivers
P7
Driver
P0.0/VREF
P0.1/AGND
P0.2/XTAL1
P0.3/XTAL2
P0.4/TX
P0.5/RX
P0.6/CNVSTR
P0.7
P1.0/PC0
P1.1/PC1
P1.2/XTAL3
P1.3/XTAL4
P1.4
P1.5/INT5
P1.6/INT6
P1.7
P2.0/SCK1
P2.1/MISO1
P2.2/MOSI1
P2.3/NSS1
P2.4
P2.5
P2.6
P2.7
32
P3.0...P6.7
16
P7.0/C2D
Rev. 1.0 7/13
Copyright © 2013 by Silicon Laboratories
C8051F96x









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C8051F962 Даташит, Описание, Даташиты
C8051F96x
2 Rev. 1.0









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C8051F962 Даташит, Описание, Даташиты
C8051F96x
Table of Contents
1. System Overview ..................................................................................................... 22
1.1. CIP-51™ Microcontroller Core .......................................................................... 28
1.1.1. Fully 8051 Compatible .............................................................................. 28
1.1.2. Improved Throughput................................................................................ 28
1.1.3. Additional Features ................................................................................... 28
1.2. Port Input/Output ............................................................................................... 29
1.3. Serial Ports ........................................................................................................ 30
1.4. Programmable Counter Array............................................................................ 30
1.5. SAR ADC with 16-bit Auto-Averaging Accumulator and Autonomous
Low Power Burst Mode ..................................................................................... 31
1.6. Programmable Current Reference (IREF0)....................................................... 32
1.7. Comparators...................................................................................................... 32
2. Ordering Information ............................................................................................... 34
3. Pinout and Package Definitions ............................................................................. 35
3.1. DQFN-76 Package Specifications ..................................................................... 46
3.1.1. Package Drawing ...................................................................................... 46
3.1.2. Land Pattern.............................................................................................. 47
3.1.3. Soldering Guidelines ................................................................................. 48
3.2. QFN-40 Package Specifications........................................................................ 50
3.3. TQFP-80 Package Specifications...................................................................... 52
3.3.1. Soldering Guidelines ................................................................................. 55
4. Electrical Characteristics ........................................................................................ 56
4.1. Absolute Maximum Specifications..................................................................... 56
4.2. Electrical Characteristics ................................................................................... 57
5. SAR ADC with 16-bit Auto-Averaging Accumulator and Autonomous
Low Power Burst Mode........................................................................................... 78
5.1. Output Code Formatting .................................................................................... 78
5.2. Modes of Operation ........................................................................................... 80
5.2.1. Starting a Conversion................................................................................ 80
5.2.2. Tracking Modes......................................................................................... 80
5.2.3. Burst Mode................................................................................................ 82
5.2.4. Settling Time Requirements...................................................................... 83
5.2.5. Gain Setting .............................................................................................. 83
5.3. 8-Bit Mode ......................................................................................................... 84
5.4. 12-Bit Mode ....................................................................................................... 84
5.5. Low Power Mode............................................................................................... 85
5.6. Programmable Window Detector....................................................................... 91
5.6.1. Window Detector In Single-Ended Mode .................................................. 93
5.6.2. ADC0 Specifications ................................................................................. 94
5.7. ADC0 Analog Multiplexer .................................................................................. 95
5.8. Temperature Sensor.......................................................................................... 97
5.8.1. Calibration ................................................................................................. 97
5.9. Voltage and Ground Reference Options ......................................................... 100
Rev. 1.0
2










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