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PDF CY7C1041DV33 Data sheet ( Hoja de datos )

Número de pieza CY7C1041DV33
Descripción 4-Mbit (256K x 16) Static RAM
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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No Preview Available ! CY7C1041DV33 Hoja de datos, Descripción, Manual

CY7C1041DV33
4-Mbit (256K × 16) Static RAM
4-Mbit (256K × 16) Static RAM
Features
Temperature ranges
Industrial: –40 °C to 85 °C
Pin and function compatible with CY7C1041CV33
High speed
tAA = 10 ns
Low active power
ICC = 90 mA
Low CMOS standby power
ISB2 = 10 mA
2.0 V data retention
Automatic power-down when deselected
TTL compatible inputs and outputs
Easy memory expansion with CE and OE features
Available in Pb-free 48-ball VFBGA, 44-pin (400-mil) molded
SOJ, and 44-pin TSOP II Packages
Functional Description
The CY7C1041DV33 is a high performance CMOS Static RAM
organized as 256K words by 16-bits. To write to the device, take
chip enable (CE) and write enable (WE) inputs LOW. If byte low
enable (BLE) is LOW, then data from I/O pins (I/O0 to I/O7) is
written into the location specified on the address pins (A0 to A17).
If byte high enable (BHE) is LOW, then data from I/O pins (I/O8
to I/O15) is written into the location specified on the address pins
(A0 to A17).
To read from the device, take chip enable (CE) and output enable
(OE) LOW while forcing the write enable (WE) HIGH. If BLE is
LOW, then data from the memory location specified by the
address pins appears on I/O0 to I/O7. If BHE is LOW, then data
from memory appears on I/O8 to I/O15. See the Truth Table on
page 11 for a complete description of read and write modes.
The input and output pins (I/O0 to I/O15) are placed in a high
impedance state when the device is deselected (CE HIGH),
outputs are disabled (OE HIGH), BHE and BLE are disabled
(BHE, BLE HIGH), or during a write operation (CE LOW and WE
LOW).
The CY7C1041DV33 is available in a standard 44-pin 400-mil
wide SOJ and 44-pin TSOP II package with center power and
ground (revolutionary) pinout and a 48-ball FBGA package.
For a complete list of related documentation, click here.
Logic Block Diagram
INPUT BUFFER
A0
A1
A2
AA34 256K × 16
A5
A6
AA78
I/O0–I/O7
I/O8–I/O15
COLUMN
DECODER
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-05473 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 8, 2016

1 page




CY7C1041DV33 pdf
CY7C1041DV33
Capacitance
Parameter [4]
Description
CIN
COUT
Input capacitance
I/O capacitance
Thermal Resistance
Parameter [4]
Description
JA Thermal resistance
(junction to ambient)
JC Thermal resistance
(junction to case)
Test Conditions
TA = 25 C, f = 1 MHz, VCC = 3.3 V
Max Unit
8 pF
8 pF
Test Conditions
Still Air, soldered on a
3 × 4.5 inch, four layer
printed circuit board
48-ball FBGA
Package
27.89
14.74
44-pin SOJ
Package
57.91
44-pin TSOP II
Package
Unit
50.66
C/W
36.73
17.17
C/W
AC Test Loads and Waveforms
The AC test loads and waveform diagram follows.
Figure 4. AC Test Loads and Waveforms [5]
10 ns device
OUTPUT
Z = 50
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
50
1.5 V
High Z Characteristics
3.3 V
OUTPUT
5 pF
(a)
R 317
R2
351
(c)
3.0 V
30 pF* GND
ALL INPUT PULSES
90%
90%
10%
10%
Rise Time: 1 V/ns
(b) Fall Time: 1 V/ns
Notes
4. Tested initially and after any design or process changes that may affect these parameters.
5. AC characteristics (except high Z) are tested using the load conditions shown in Figure 4 (a). High Z characteristics are tested for all speeds using the test load shown
in Figure 4 (c).
Document Number: 38-05473 Rev. *O
Page 5 of 18

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CY7C1041DV33 arduino
CY7C1041DV33
Truth Table
CE OE WE
HXX
L LH
L LH
L LH
LXL
LXL
LXL
L HH
LXX
BLE
X
L
L
H
L
L
H
X
H
BHE
X
L
H
L
L
H
L
X
H
I/O0–I/O7
High Z
Data out
Data out
High Z
Data in
Data in
High Z
High Z
High Z
I/O8–I/O15
High Z
Data out
High Z
Data out
Data in
High Z
Data in
High Z
High Z
Mode
Power down
Read all bits
Read lower bits only
Read upper bits only
Write all bits
Write lower bits only
Write upper bits only
Selected, outputs disabled
Selected, outputs disabled
Power
Standby (ISB)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Active (ICC)
Document Number: 38-05473 Rev. *O
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