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PDF CY7C1021D Data sheet ( Hoja de datos )
| Número de pieza | CY7C1021D | |
| Descripción | 1-Mbit (64K x 16) Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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CY7C1021D
1-Mbit (64K × 16) Static RAM
1-Mbit (64K × 16) Static RAM
Features
■ Temperature Ranges:
❐ Industrial: –40 °C to 85 °C
❐ Automotive-A: –40 °C to 85 °C
■ Pin and Function Compatible with CY7C1021B
■ High Speed
❐ tAA = 10 ns
■ Low Active Power
❐ ICC = 80 mA at 10 ns
■ Low CMOS Standby Power
❐ ISB2 = 3 mA
■ 2.0 V Data Retention
■ Automatic Power Down when Deselected
■ CMOS for Optimum Speed and Power
■ Independent Control of Upper and Lower Bits
■ Available in Pb-free 44-pin 400 Mils Wide Molded SOJ and
44-pin TSOP II Packages
Functional Description
The CY7C1021D is a high performance CMOS static RAM
organized as 65,536 words by 16 bits. This device has an
automatic power down feature that significantly reduces power
consumption when deselected. The input and output pins (I/O0
through I/O15) are placed in a high impedance state when the
device is deselected (CE HIGH), outputs are disabled (OE
HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during
a write operation (CE LOW and WE LOW).
Write to the device by taking Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from I/O pins (I/O0 through I/O7), is written into the location
specified on the address pins (A0 through A15). If Byte High
Enable (BHE) is LOW, then data from I/O pins (I/O8 through
I/O15) is written into the location specified on the address pins
(A0 through A15).
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appears on I/O0 to I/O7. If
Byte High Enable (BHE) is LOW, then data from memory
appears on I/O8 to I/O15. See the Truth Table on page 10 for a
complete description of read and write modes.
The CY7C1021D device is suitable for interfacing with
processors that have TTL I/P levels. It is not suitable for
processors that require CMOS I/P levels. Please see Electrical
Characteristics on page 4 for more details and suggested
alternatives.
For a complete list of related documentation, click here.
Logic Block Diagram
DATA IN DRIVERS
A7
A6
A5
A4
A3
64K x 16
RAM Array
A2
A1
A0
COLUMN DECODER
I/O0–I/O7
I/O8–I/O15
BHE
WE
CE
OE
BLE
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-05462 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 2, 2016
1 page  
CY7C1021D
Capacitance
Parameter [4]
Description
CIN
COUT
Input capacitance
Output capacitance
Thermal Resistance
Parameter [4]
Description
JA Thermal resistance
(junction to ambient)
JC Thermal resistance
(junction to case)
Test Conditions
TA = 25C, f = 1 MHz, VCC = 5.0 V
Max Unit
8 pF
8 pF
Test Conditions
Still Air, soldered on a 3 × 4.5 inch,
four-layer printed circuit board
44-pin SOJ 44-pin TSOP II Unit
59.52
53.91
C/W
36.75
21.24
C/W
AC Test Loads and Waveforms
Figure 2. AC Test Loads and Waveforms [5]
OUTPUT
Z = 50
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
50
1.5 V
(a)
30 pF*
3.0 V
GND
ALL INPUT PULSES
90%
90%
10%
10%
Rise Time: 3 ns
(b) Fall Time: 3 ns
High-Z characteristics:
R1 480
5V
OUTPUT
INCLUDING
JIG AND
SCOPE
5 pF
(c)
R2
255
Notes
4. Tested initially and after any design or process changes that may affect these parameters.
5. AC characteristics (except High Z) are tested using the load conditions shown in Figure 2 (a). High Z characteristics are tested for all speeds using the test load
shown in Figure 2 (c).
Document Number: 38-05462 Rev. *O
Page 5 of 17
5 Page 
Ordering Information
Speed
(ns)
Ordering Code
Package
Diagram
Package Type
10 CY7C1021D-10VXI
51-85082 44-pin (400-Mil) Molded SOJ (Pb-free)
CY7C1021D-10ZSXI
51-85087 44-pin TSOP Type II (Pb-free)
CY7C1021D-10ZSXA
Shaded areas contain advance information. Contact your local Cypress sales representative for availability of these parts.
Ordering Code Definitions
CY 7 C 1 02 1 D - 10 XX X X
Temperature Range: X = I or A
I = Industrial; A = Automotive-A
Pb-free
Package Type: XX = V or ZS
V = 44-pin Molded SOJ
ZS = 44-pin TSOP Type II
Speed: 10 ns
D = C9, 90 nm Technology
Data Width: 1 = × 16-bits
Density: 02 = 1-Mbit density
1 = Fast Asynchronous SRAM family
Technology Code: C = CMOS
Marketing Code: 7 = SRAM
Company ID: CY = Cypress
CY7C1021D
Operating
Range
Industrial
Automotive-A
Document Number: 38-05462 Rev. *O
Page 11 of 17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet CY7C1021D.PDF ] | |
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