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AD5780 PDF даташит

Спецификация AD5780 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «Voltage Output DAC».

Детали детали

Номер произв AD5780
Описание Voltage Output DAC
Производители Analog Devices
логотип Analog Devices логотип 

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AD5780 Даташит, Описание, Даташиты
Data Sheet
System Ready, 18-Bit ±1 LSB INL,
Voltage Output DAC
AD5780
FEATURES
True 18-bit voltage output DAC, ±1 LSB INL
8 nV/√Hz output noise spectral density
0.025 LSB long-term linearity error stability
±0.018 ppm/°C gain error temperature coefficient
2.5 µs output voltage settling time
3.5 nV-sec midscale glitch impulse
Integrated precision reference buffers
Operating temperature range: −40°C to +125°C
4 mm × 5 mm LFCSP package
Wide power supply range of up to ±16.5 V
35 MHz Schmitt triggered digital interface
1.8 V-compatible digital interface
APPLICATIONS
Medical instrumentation
Test and measurement
Industrial control
Scientific and aerospace instrumentation
Data acquisition systems
Digital gain and offset adjustment
Power supply control
GENERAL DESCRIPTION
The AD57801 is a true 18-bit, unbuffered voltage output DAC
that operates from a bipolar supply of up to 33 V. The AD5780
accepts a positive reference input range of 5 V to VDD − 2.5 V
and a negative reference input range of VSS + 2.5 V to 0 V. Both
reference inputs are buffered on chip and external buffers are
not required. The AD5780 offers a relative accuracy specifica-
tion of ±1 LSB maximum range, and operation is guaranteed
monotonic with a ±1 LSB DNL maximum range specification.
The part uses a versatile 3-wire serial interface that operates at
clock rates of up to 35 MHz and is compatible with standard
SPI, QSPI™, MICROWIRE™, and DSP interface standards. The
part incorporates a power-on reset circuit that ensures that the
DAC output powers up to 0 V in a known output impedance
state and remains in this state until a valid write to the device
takes place. The part provides an output clamp feature that
places the output in a defined load state.
IOVCC
SDIN
SCLK
SYNC
SDO
LDAC
CLR
RESET
FUNCTIONAL BLOCK DIAGRAM
VCC
VDD
VREFP
AD5780
INPUT
SHIFT
REGISTER
AND
CONTROL
LOGIC
18
DAC 18
REG
18-BIT
DAC
R1 RFB
6.8kΩ 6.8kΩ
A1 RFB
INV
VOUT
6kΩ
POWER-ON RESET
AND CLEAR LOGIC
DGND VSS AGND VREFN
Figure 1.
Table 1. Related Devices
Part No.
Description
AD5790
20-bit, 2 LSB accurate DAC
AD5791
20-bit, 1 ppm accurate DAC
AD5781
18-bit, 0.5 LSB accurate DAC
AD5541A/AD5542A 16-bit, 1 LSB accurate 5 V DAC
AD5760
16-bit, 0.5 LSB accurate DAC
PRODUCT HIGHLIGHTS
1. True 18-bit accuracy.
2. Wide power supply range of up to ±16.5 V.
3. −40°C to +125°C operating temperature range.
4. Low 8 nV/√Hz noise.
5. Low ±0.018 ppm/°C gain error temperature coefficient.
COMPANION PRODUCTS
Output Amplifier Buffer: AD8675, ADA4898-1, ADA4004-1
External Reference: ADR445, ADR4550
DC-to-DC Design Tool: ADIsimPower™
Additional companion products on the AD5780 product page
1 Protected by U.S. Patent No. 7,884,747 and 8,089,380.
Rev. E
Document Feedback
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responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com









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AD5780 Даташит, Описание, Даташиты
AD5780* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
EVALUATION KITS
AD5780 Evaluation Board
DOCUMENTATION
Data Sheet
AD5780: System Ready, 18-Bit ±1 LSB INL,Voltage Output
DAC Data Sheet
User Guides
AD5760/AD5780/AD5790 Quick Start Quide
UG-256: Evaluation Board for a 18-Bit Serial Input, Voltage
Output DAC with Integrated Precision Reference Buffer
Amplifiers
SOFTWARE AND SYSTEMS REQUIREMENTS
AD5780 - Microcontroller No-OS Driver
AD5780 IIO DAC Linux Driver
AD5780 FMC-SDP Interposer & Evaluation Board / Xilinx
KC705 Reference Design
BeMicro FPGA Project for AD5780 with Nios driver
REFERENCE DESIGNS
CN0200
REFERENCE MATERIALS
Solutions Bulletins & Brochures
Digital to Analog Converters ICs Solutions Bulletin
DESIGN RESOURCES
AD5780 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
View all AD5780 EngineerZone Discussions.
SAMPLE AND BUY
Visit the product page to see pricing options.
TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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AD5780 Даташит, Описание, Даташиты
AD5780
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Companion Products ....................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics ............................................. 9
Terminology .................................................................................... 17
Theory of Operation ...................................................................... 18
REVISION HISTORY
7/13—Rev. D to Rev. E
Changes to t1 Test Conditions/Comments and Endnote 2 ......... 5
Deleted Figure 4................................................................................ 7
Changes to Pin 11 Description ....................................................... 8
Deleted Daisy-Chain Operation Section..................................... 19
7/12—Rev. C to Rev. D
Changes to Figure 53...................................................................... 24
Changes to Figure 55...................................................................... 26
3/12—Rev. B to Rev. C
Changes to Data Sheet Title and added Patent 8,089,380 ........... 1
2/12—Rev. A to Rev. B
Deleted Linearity Compensation Section ................................... 24
12/11—Rev. 0 to Rev. A
Edits to Table 2.................................................................................. 3
Changes to Figure 48...................................................................... 17
Changes to DAC Register Section ................................................ 21
Changes to Table 10 and Table 11 ................................................ 22
11/11—Revision 0: Initial Version
Data Sheet
DAC Architecture....................................................................... 18
Serial Interface ............................................................................ 18
Hardware Control Pins.............................................................. 19
On-Chip Registers...................................................................... 19
AD5780 Features ............................................................................ 23
Power-On to 0 V......................................................................... 23
Configuring the AD5780 .......................................................... 23
DAC Output State ...................................................................... 23
Output Amplifier Configuration.............................................. 23
Applications Information .............................................................. 25
Typical Operating Circuit ......................................................... 25
Evaluation Board ........................................................................ 26
Outline Dimensions ....................................................................... 27
Ordering Guide .......................................................................... 27
Rev. E | Page 2 of 28










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