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PDF ASI4U-F Data sheet ( Hoja de datos )
| Número de pieza | ASI4U-F | |
| Descripción | V3.0 Compliant Universal AS-i IC | |
| Fabricantes | IDT | |
| Logotipo |  |
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AS-Interface Spec. V3.0
Compliant Universal AS-i IC
ASI4U /
ASI4U-E /
ASI4U-F
Datasheet
Brief Description
The ASI4U is a next-generation CMOS integrated
circuit for AS-i networks. This low-level field bus AS-i
(Actuator Sensor Interface) was designed for easy,
safe, and cost-effective interconnection of sensors,
actuators, and switches. It transports both power
and data over the same two-wire unshielded cable.
The ASI4U is used as part of a master or slave node
and functions as an interface to the physical bus. It
provides the power supply, physical data transfer,
and communication protocol handling. The ASI4U is
fully compliant with the AS-Interface Complete
Specification V3.0. It is function and pin compatible
with the A²SI IC.
All configuration data are stored in an internal
EEPROM that can be easily programmed by a
stationary or handheld programming device. The
special AS-i safety option assures short response
times for security-related events.
Features
• Compliant with AS-Interface Complete Specifica-
tion V3.0
• Universal application: slaves, masters, repeaters,
and bus-monitors
• Floating AS-i transmitter and receiver for highly
symmetrical high-power applications
• On-chip electronic inductor with current drive
capability of 55 mA
• Two configurable LED outputs to support all
AS-Interface Complete Specification V3.0 status
indication modes
• Several data pre-processing functions, including
configurable data input filters and bit-selective
data inverting
• Additional addressing channel for easy wireless
module setup
• Support of 8 and 16 MHz crystals by automatic
frequency detection
• Special AS-i safety option
• Clock watchdog for high system security
Related Products
• SAP5 Universal AS-Interface IC
Benefits
• Flexible, separated I/O pins
• Flexible AS-i Bus adoption (isolated transceiver)
• Very small package SSOP28 (ASI4U and ASI4U-F)
• High ambient temperature applications (ASI4U-E)
Physical Characteristics
• ASI4U operational temperature: -25 to +85 °C
• ASI4U-F operational temperature: -40 to +85 °C
• ASI4U-E operational temperature: -25 to +105 °C
• RoHS-conformant package: SSOP28 (ASI4U and
ASI4U-F) / SOP28 (ASI4U-E)
Available Support
• IDT AS-Interface Programmer Kit V2.0
• IDT ASI4U Evaluation Board V2.0
ASI4U Basic Application Circuits
Standard Application
UIN
OSC1
UOUT
FID
DSR
+24V
OSC2
PST
ASI+
ASIP
DI[3:0]
DO[3:0]
ASI4U
ASI-
ASIN
P[3:0]
CAP
U5R
LED1
LED2
0V IRD
GND
+0V
Extended Power Application with IR-Addressing Option
+24V
UIN
OSC1
UOUT
FID
DSR
OSC2
PST
ASI+
ASIP
DI[3:0]
DO[3:0]
ASI4U
ASI-
ASIN
P[3:0]
CAP
U5R
LED1
LED2
0V IRD
GND
+0V
© 2016 Integrated Device Technology, Inc.
1
January 26, 2016
1 page  
ASI4U / ASI4U-E / ASI4U-F Datasheet
5 Application Circuits ......................................................................................................................................... 60
6 Package Specifications .................................................................................................................................. 64
6.1. Package Pin Assignment......................................................................................................................... 64
6.2. SOP28 Package Outline for ASI4U-E ..................................................................................................... 66
6.3. SSOP28 Package Outline for ASI4U and ASI4U-F................................................................................. 67
6.4. Package Marking ..................................................................................................................................... 68
7 Ordering Information ...................................................................................................................................... 69
8 Related Documents........................................................................................................................................ 69
9 Glossary ......................................................................................................................................................... 70
10 Document Revision History ............................................................................................................................ 70
List of Figures
Figure 2.1 Ptot = f(Ta) ............................................................................................................................................ 9
Figure 3.1 ASI4U Functional Block Diagram ..................................................................................................... 11
Figure 3.2 Conventional Application for AS-i IC with One External Coil............................................................ 15
Figure 3.3 Application for AS-i IC with Two External Coils ................................................................................ 15
Figure 3.4 Data Path in the Master, Repeater, and Monitor Modes .................................................................. 21
Figure 4.1 Simplified Receiver Comparator Threshold Setup ........................................................................... 25
Figure 4.2 Addressing Channel Input (IRD), Photo-Current Waveforms........................................................... 28
Figure 4.3 Timing Diagram Parameter Ports P[3:0] and PST............................................................................ 32
Figure 4.4 Timing Diagram Data Ports DO[3:0], DI[3:0] and DSR..................................................................... 35
Figure 4.5 Input Path at Data Port ..................................................................................................................... 35
Figure 4.6 Principles of Input Filtering ............................................................................................................... 36
Figure 4.7 Principle of AS-i Cycle Input Filtering (Example for Slave with Address 1)...................................... 37
Figure 4.8 Flowchart – Input DI3, DI2, and DI1 in Safety Mode ........................................................................ 43
Figure 4.9 Flowchart – Input DI0 in Safety Mode .............................................................................................. 44
Figure 4.10 Flowchart – Data_Exchange_Disable .............................................................................................. 45
Figure 4.11 Power-On Behavior (All Modes) ....................................................................................................... 50
Figure 4.12 Timing Diagram External Reset via DSR ......................................................................................... 51
Figure 4.13 Manchester-II-Coded Modulation Principle ...................................................................................... 54
Figure 5.1 Standard Application Circuit with Bi-directional Data I/O ................................................................. 61
Figure 5.2 Extended Power Application Circuit with IR-Addressing Option ...................................................... 62
Figure 5.3 ASI4U Master/Repeater Mode Application....................................................................................... 63
Figure 6.1 ASI4U Package Pin Assignment ...................................................................................................... 65
Figure 6.2 SOP28 Package Outline Dimensions ............................................................................................... 66
Figure 6.3 SSOP28 Package Outline Dimensions ............................................................................................ 67
Figure 6.4 Package Marking .............................................................................................................................. 68
© 2016 Integrated Device Technology, Inc.
5
January 26, 2016
5 Page 
ASI4U / ASI4U-E / ASI4U-F Datasheet
3 Basic Functional Description
3.1. Functional Block Diagram
Figure 3.1 ASI4U Functional Block Diagram
UIN UOUT
U5R
OSC1 OSC2
CAP
ELECTRONIC
INDUCTOR
POWER
SUPPLY
OSCILLATOR
OUTPUT
STAGE
DO(3:0)
ASI4U/ASI4U-E/ASI4U-F
INPUT
STAGE
ASIP
ASIN
THERMAL /
OVERLOAD
PROTECTION
RECEIVE
P - PULSE
N - PULSE
I/O
RESET STAGE
REC- RESET
TRANSMIT
SEND -D
SEND- SBY
DIGITAL
LOGIC
DATA- STRB
PARAM OUTPUT
STRB STAGE
OVER- LOAD
INPUT
STAGE
OVER- HEAT
IRD_IN
CMOS AC
INPUT CURRENT
STAGE INPUT
OUTPUT
STAGE
DIG ANA
INPUT
STAGE
OUTPUT
STAGE
DI(3:0)
DSR
PST
P(3:0)
AGND
LGND
0V GND
IRD LED1 LED2 FID
Following device functions are associated with the different blocks of the IC:
RECEIVE
The RECEIVE block converts the analog telegram waveform from the AS-i bus to a digital pulse-
coded signal that can be processed further by a digital UART circuit.
The RECEIVE block is directly connected to the ASIP and ASIN pins, which connect to the AS-i
line. It converts the differential AS-i telegram to a single-ended signal and removes the DC offset
by high-pass filtering. To adapt quickly to changing signal amplitudes in telegrams from different
network users, the amplitude of the first telegram pulse is measured by a 3-bit flash ADC and the
threshold of a positive and a negative comparator is set accordingly to about 50% of the mea-
sured level. The comparators generate the P-pulse and N-pulse signals.
© 2016 Integrated Device Technology, Inc.
11
January 26, 2016
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ASI4U-F.PDF ] | |
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