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AD8111 PDF даташит

Спецификация AD8111 изготовлена ​​​​«Analog Devices» и имеет функцию, называемую «16 x 8 Buffered Video Crosspoint Switches».

Детали детали

Номер произв AD8111
Описание 16 x 8 Buffered Video Crosspoint Switches
Производители Analog Devices
логотип Analog Devices логотип 

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AD8111 Даташит, Описание, Даташиты
a
260 MHz, 16 ؋ 8 Buffered
Video Crosspoint Switches
AD8110/AD8111
FEATURES
16 ؋ 8 High-Speed Nonblocking Switch Arrays
AD8110: G = +1
AD8111: G = +2
Serial or Parallel Switch Array Control
Serial Data Out Allows “Daisy Chaining” of Multiple
Crosspoints to Create Larger Switch Arrays
Pin-Compatible with AD8108/AD8109 8 ؋ 8 Switch
Arrays
For a 16 ؋ 16 Array See AD8116
Complete Solution
Buffered Inputs
Eight Output Amplifiers, AD8110 (G = +1),
AD8111 (G = +2)
Drives 150 V Loads
Excellent Video Performance
60 MHz 0.1 dB Gain Flatness
0.02% Differential Gain Error (RL = 150 V)
0.028 Differential Phase Error (RL = 150 V)
Excellent AC Performance
260 MHz –3 dB Bandwidth
500 V/ms Slew Rate
Low Power of 50 mA
Low All Hostile Crosstalk of –78 dB @ 5 MHz
Output Disable Allows Direct Connection of Multiple
Device Outputs
Reset Pin Allows Disabling of All Outputs (Connected
Through a Capacitor to Ground Provides “Power-
On” Reset Capability)
Excellent ESD Rating: Exceeds 4000 V Human Body
Model
80-Lead LQFP Package (12 mm ؋ 12 mm)
APPLICATIONS
Routing of High-Speed Signals Including:
Composite Video (NTSC, PAL, S, SECAM)
Component Video (YUV, RGB)
Compressed Video (MPEG, Wavelet)
3-Level Digital Video (HDB3)
PRODUCT DESCRIPTION
The AD8110 and AD8111 are high-speed 16 × 8 video cross-
point switch matrices. They offer a –3 dB signal bandwidth
greater than 260 MHz, and channel switch times of less than
25 ns with 1% settling. With –78 dB of crosstalk and –97 dB
isolation (@ 5 MHz), the AD8110/AD8111 are useful in many
high-speed applications. The differential gain and differential
FUNCTIONAL BLOCK DIAGRAM
SER/PAR D0 D1 D2 D3 D4
CLK
DATA IN
UPDATE
CE
RESET
A0
A1
A2
40-BIT SHIFT REGISTER
WITH 5-BIT
PARALLEL LOADING
40
PARALLEL LATCH
40
DECODE
8 ؋ 5:16 DECODERS
SET INDIVIDUAL
OR RESET ALL
OUTPUTS
TO "OFF"
8
DATA
OUT
AD8110/AD8111
OUTPUT
128 BUFFER
G = +1,
G = +2
16 INPUTS
SWITCH
MATRIX
8 OUTPUTS
phase of better than 0.02% and 0.02° respectively, along with
0.1 dB flatness out to 60 MHz, make the AD8110/AD8111
ideal for video signal switching.
The AD8110 and AD8111 include eight independent output
buffers that can be placed into a high impedance state for paral-
leling crosspoint outputs so that off channels do not load the
output bus. The AD8110 has a gain of +1, while the AD8111
offers a gain of +2. They operate on voltage supplies of ±5 V
while consuming only 50 mA of idle current. The channel
switching is performed via a serial digital control (which can
accommodate “daisy chaining” of several devices) or via a parallel
control, allowing updating of an individual output without repro-
gramming the entire array.
The AD8110/AD8111 is packaged in an 80-lead LQFP package
and is available over the extended industrial temperature range
of –40°C to +85°C.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com









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AD8111 Даташит, Описание, Даташиты
AD8110/AD8111–SPECIFICATIONS (VS = ؎5 V, TA = +25؇C, RL = 1 kunless otherwise noted.)
Parameter
DYNAMIC PERFORMANCE
–3 dB Bandwidth
Propagation Delay
Slew Rate
Settling Time
Gain Flatness
NOISE/DISTORTION PERFORMANCE
Differential Gain Error
Differential Phase Error
Crosstalk, All Hostile
Off Isolation, Input-Output
Input Voltage Noise
DC PERFORMANCE
Gain Error
Gain Matching
Gain Temperature Coefficient
OUTPUT CHARACTERISTICS
Output Impedance
Output Disable Capacitance
Output Leakage Current
Output Voltage Range
Output Current
Short Circuit Current
INPUT CHARACTERISTICS
Input Offset Voltage
Input Voltage Range
Input Capacitance
Input Resistance
Input Bias Current
SWITCHING CHARACTERISTICS
Enable On Time
Switching Time, 2 V Step
Switching Transient (Glitch)
POWER SUPPLIES
Supply Current
Supply Voltage Range
PSRR
OPERATING TEMPERATURE RANGE
Temperature Range
θJA
Specifications subject to change without notice.
Conditions
200 mV p-p, RL = 150 Ω
2 V p-p, RL = 150 Ω
2 V p-p, RL = 150 Ω
2 V Step, RL = 150 Ω
0.1%, 2 V Step, RL = 150 Ω
0.05 dB, 200 mV p-p, RL = 150 Ω
0.05 dB, 2 V p-p, RL = 150 Ω
0.1 dB, 200 mV p-p, RL = 150 Ω
0.1 dB, 2 V p-p, RL = 150 Ω
NTSC or PAL, RL = 1 kΩ
NTSC or PAL, RL =150 Ω
NTSC or PAL, RL = 1 kΩ
NTSC or PAL, RL = 150 Ω
f = 5 MHz
f = 10 MHz
f =  MHz, RL =150 Ω, One Channel
0.01 MHz to 50 MHz
RL = 1 kΩ
RL = 150 Ω
No Load, Channel-Channel
RL = 1 kΩ, Channel-Channel
DC, Enabled
Disabled
Disabled
Disabled, AD8110 Only
No Load
Worst Case (All Configurations)
Temperature Coefficient
Any Switch Configuration
Per Output Selected
50% UPDATE to 1% Settling
Measured at Output
AVCC, Outputs Enabled, No Load
AVCC, Outputs Disabled
AVEE, Outputs Enabled, No Load
AVEE, Outputs Disabled
DVCC
f = 100 kHz
f = 1 MHz
Operating (Still Air)
Operating (Still Air)
AD8110/AD8111
Min Typ Max
Unit
Reference
300/190
390/260
150
5
500
40
60/40
65/40
80/57
70/57
MHz
MHz
ns
V/μs
ns
MHz
MHz
MHz
MHz
TPC 1, 7
TPC 1, 7
TPC 6, 12
TPC 1, 7
TPC 1, 7
TPC 1, 7
TPC 1, 7
0.01
0.02
0.01
0.02
o78/o85
o7/o8
o9/o
15
%
%
Degrees
Degrees
dB
dB
dB
nV/Hz
TPC 2, 8
TPC 2, 8
TPC 17, 23
TPC 14, 20
0.04/0.1
0.15/0.25
0.5/8
0.07/0.5
0.02/1.0
0.09/1.0
%
%
%
%
ppm/°C
± 2.5
20
0.2
10/0.001
2
1/NA
±3
40
65
Ω 18, 24
MΩ 15, 21
pF
μA
V
mA
mA
± 2.5/± 1.25
1
5
12
± 3/± 1.5
2.5
10
2
20
5
mV
μV/°C
V
pF
MΩ
μA
29, 35
30, 36
60
25
20/30
ns
ns
mV p-p 16, 22
38
15
38
15
11
± 4.5 to ± 5.5
75/78
–55/–58
mA
mA
mA
mA
mA
V
dB 13, 19
dB
–40 to +85
48
°C
°C/W
–2– 3&7#









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AD8111 Даташит, Описание, Даташиты
TIMING CHARACTERISTICS (Serial)
Parameter
Serial Data Setup Time
CLK Pulsewidth
Serial Data Hold Time
CLK Pulse Separation, Serial Mode
CLK to UPDATE Delay
UPDATE Pulsewidth
CLK to DATA OUT Valid, Serial Mode
Propagation Delay, UPDATE to Switch On or Off
Data Load Time, CLK = 5 MHz, Serial Mode
CLK, UPDATE Rise and Fall Times
RESET Time
Symbol
t1
t2
t3
t4
t5
t6
t7
Min
20
100
20
100
0
50
200
AD8110/AD8111
Limit
Typ
Max
180
8
8
100
Unit
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
1
CLK
0
1
DATA IN
0
1 = LATCHED
UPDATE
0 = TRANSPARENT
DATA OUT
t2
t1 t3
OUT7 (D4)
t7
t4
LOAD DATA INTO
SERIAL REGISTER
ON FALLING EDGE
OUT7 (D3)
OUT00 (D0)
t5
TRANSFER DATA FROM SERIAL
REGISTER TO PARALLEL
LATCHES DURING LOW LEVEL
t6
Figure 1. Timing Diagram, Serial Mode
VIH
RESET, SER/PAR
CLK, DATA IN,
CE, UPDATE
2.0 V min
Table I. Logic Levels
VIL
RESET, SER/PAR
CLK, DATA IN,
CE, UPDATE
VOH
DATA OUT
VOL
DATA OUT
0.8 V max
2.7 V min 0.5 V max
IIH
RESET, SER/PAR
CLK, DATA IN,
CE, UPDATE
20 μA max
IIL
RESET, SER/PAR
CLK, DATA IN,
CE, UPDATE
–400 μA min
IOH IOL
DATA OUT DATA OUT
–400 μA max 3.0 mA min
3&7#
–3–










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