DataSheet26.com

HI-15530 PDF даташит

Спецификация HI-15530 изготовлена ​​​​«HOLTIC» и имеет функцию, называемую «5V / 3.3V Manchester Encoder / Decoder».

Детали детали

Номер произв HI-15530
Описание 5V / 3.3V Manchester Encoder / Decoder
Производители HOLTIC
логотип HOLTIC логотип 

13 Pages
scroll

No Preview Available !

HI-15530 Даташит, Описание, Даташиты
HI-15530
September 2013
5V / 3.3V Manchester Encoder / Decoder
GENERAL DESCRIPTION
The HI-15530 is a high performance CMOS integrated
circuit designed to meet the requirements of MIL-STD-1553
and similar Manchester II encoded, time division
multiplexed serial data protocols. The HI-15530 contains
both an Encoder and Decoder, which operate
independently.
The HI-15530 is fully compatible with either 5V or 3.3V logic
and transceivers.
The device generates MIL-STD-1553 sync pulses, parity
bits as well as the Manchester II encoding of the data bits.
The decoder recognizes and identifies sync pulses,
decodes data bits, and performs parity checking.
The HI-15530 supports the 1Mbit/s data rate of MIL-STD-
1553 over the full temperature and voltage range.
For applications requiring small footprints and low cost, the
HI-15530 is available in a 24-pin plastic SSOP package.
Ceramic DIP and LCC packages are also available to
achieve the highest level of reliability and to provide drop-in
replacements for obsolete parts from other manufacturers.
FEATURES
! MIL-STD-1553 compatible
! 5V or 3.3V operation
! Interfaces to HI-1567 Transceiver Family
! Small footprint 24-pin plastic SSOP package
option
! Direct replacement for:
Harris/Intersil HD15530
GEC Plessey Semiconductors MAS15530
Aeroflex ACT15530
! 1.25 Mbit/s Maximum Data Rate
! Manchester II Encode and Decode
! Sync identification and Lock-in
! High Temperature -55oC to +200oC option
APPLICATIONS
! MIL-STD-1553 Interfaces
! Smart Munitions
! Stores Management
! Sensor Interfaces
! Instrumentation
PIN CONFIGURATION (Top View)
VALID WORD 1
ENCODER SHIFT CLK 2
TAKE DATA 3
SERIAL DATA OUT 4
DECODER CLK 5
BIPOLAR ZERO IN 6
BIPOLAR ONE IN 7
UNIPOLAR DATA IN 8
DECODER SHIFT CLK 9
COMMAND / DATA SYNC 10
DECODER RESET 11
GND 12
HI-15530PSI
HI-15530PST
HI-15530PSM
24 VDD
23 ENCODER CLK
22 SEND CLK IN
21 SEND DATA
20 SYNC SELECT
19 ENCODER ENABLE
18 SERIAL DATA IN
17 BIPOLAR ONE OUT
16 OUTPUT INHIBIT
15 BIPOLAR ZERO OUT
14 ¸ 6 OUT
13 MASTER RESET
24 Pin SSOP package
(Additional package pin configurations shown inside data sheet)
(DS15530 Rev. K)
HOLT INTEGRATED CIRCUITS
www.holtic.com
09/13









No Preview Available !

HI-15530 Даташит, Описание, Даташиты
HI-15530
PIN DESCRIPTIONS
SIGNAL
VALID WORD
ENCODER SHIFT CLOCK
TAKE DATA
SERIAL DATA OUT
DECODER CLOCK
BIPOLAR ZERO IN
BIPOLAR ONE IN
UNIPOLAR DATA IN
DECODER SHIFT CLOCK
COMMAND / DATA SYNC
DECODER RESET
GND
MASTER RESET
¸6 OUT
BIPOLAR ZERO OUT
OUTPUT INHIBIT
BIPOLAR ONE OUT
SERIAL DATA IN
ENCODER ENABLE
SYNC SELECT
SEND DATA
SEND CLOCK IN
ENCODER CLOCK
VDD
SECTION
DECODER
ENCODER
DECODER
DECODER
DECODER
DECODER
DECODER
DECODER
DECODER
DECODER
DECODER
BOTH
BOTH
ENCODER
ENCODER
ENCODER
ENCODER
ENCODER
ENCODER
ENCODER
ENCODER
ENCODER
ENCODER
BOTH
FUNCTION
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
INPUT
OUTPUT
OUTPUT
INPUT
POWER
INPUT
OUTPUT
OUTPUT
INPUT
OUTPUT
INPUT
INPUT
INPUT
OUTPUT
INPUT
INPUT
POWER
DESCRIPTION
A high output signals the receipt of a valid word
Shifts data into the encoder on a low to high transition
Output is high during receipt of data after identification of a Sync
Pulse and two valid Manchester data bits.
Received Data output in NRZ format
12x the data rate. Clock for the transition finder and synchronizer,
which generates the internal clock for the remainder of the decoder
A high input indicates the 1553 bus is in its negative state.
This pin must be held high when the Unipolar input is used
A high input indicates the 1553 bus is in the positive state.
This pin must be held low when the Unipolar input is used
Input for unipolar data to the transition finder. Must be held low when
Not in use
Provides the DECODER CLOCK divided by 12, synchronized by the
recovered serial data
A high on this pin occurs during the output of decoded data which
was preceded by a Command (or Status) synchronizing character. A
low output indicates a Data synchronizing character
A high applied to this pin during a DECODER SHIFT CLOCK rising
edge resets the bit counter
0V supply
A high on this pin clears the 2:1 counters in both Encoder and
Decoder and resets the divide-by-6 circuit
Provides ENCODER CLOCK divided by 6
An active low output intended to drive the zero or negative sense of
a MIL-STD-1553 Line Driver
A low inhibits the BIPOLAR ZERO OUT and BIPOLAR ONE OUT by
forcing them to inactive high states
An active low output intended to drive the one or positive sense on a
MIL-STD-1553 Line Driver
Accepts serial data at the rate of the ENCODER SHIFT CLOCK
A high on this pin initiates the encode cycle. (Subject to the
preceeding cycle being complete)
Actuates a Command Sync for an input high and a Data Sync for a
low
An active high output which enables the external source of serial
Data
Clock input at 2 times the Data rate, usually driven by ¸6 OUT
Input to the divide by 6 circuit. Normal frequency is Data rate x12
3.0 V to 5.5 V power supply pin
HOLT INTEGRATED CIRCUITS
2









No Preview Available !

HI-15530 Даташит, Описание, Даташиты
HI-15530
ENCODER OPERATION
The Encoder requires a single clock with a frequency of
twice the desired data rate applied at the SEND CLOCK
input. An auxiliary divide-by-six counter is provided on chip
which can be utilized to produce the SEND CLOCK by
dividing the ENCODER CLOCK.
To abort the Encoder transmission a positive pulse must be
applied at MASTER RESET. Anytime after or during this
pulse, a low to high transition on SEND CLOCK clears the
internal counters and initializes the Encoder for a new
word.
The Encoder's cycle begins when ENCODER ENABLE is
high during a falling edge of ENCODER SHIFT CLOCK (1).
This cycle lasts for one word length or twenty ENCODER
SHIFT CLOCK periods. At the next low-to-high transition of
the ENCODER SHIFT CLOCK, a high at SYNC SELECT
input actuates a command sync or a low will produce a
data sync for that word (2). When the Encoder is ready to
accept data, the SEND DATA output will go high and
remain high for sixteen ENCODER SHIFT CLOCK periods
(3). During these sixteen periods the data should be
clocked into the SERIAL DATA IN input with every low-to-
high transition of the ENCODER SHIFT CLOCK (3) - (4).
After the sync and the Manchester II coded data are
transmitted through the BIPOLAR ONE and BIPOLAR
ZERO outputs, the Encoder adds on an additional bit which
is the parity for that word (5). If ENCODER ENABLE is held
high continuously, consecutive words will be encoded
without an interframe gap. ENCODER ENABLE must go
low by time (5) as shown to prevent a consecutive word
from being encoded. At any time a low on the OUTPUT
INHIBIT input will force both bipolar outputs to a high state
but will not affect the Encoder in any other way.
MASTER RESET
SEND CLK IN
¸ 6 OUT
¸6
ENCODER CLK
¸2
OUTPUT
INHIBIT
BIPOLAR
ONE OUT
Character
Former
BIPOLAR
ZERO OUT
Bit
Counter
SYNC
SELECT
SEND
DATA
ENCODER
SHIFT
CLK
SERIAL
DATA
IN
ENCODER
ENABLE
FIGURE 1. ENCODER
TIMING
SEND CLK
ENCODER
SHIFT CLK
ENCODER
ENABLE
SYNC SELECT
SEND DATA
SERIAL
DATA IN
BIPOLAR
ONE OUT
BIPOLAR
ZERO OUT
01234567
15 16 17 18 19
VALID
DON’T CARE
DON’T CARE
15 14 13 12 11 10
32 1 0
SYNC SYNC 15 14 13 12 11
32 10P
SYNC SYNC 15 14 13 12 11
32 10P
(1) (2)
(3)
FIGURE 2. ENCODER OPERATION
(4) (5)
HOLT INTEGRATED CIRCUITS
3










Скачать PDF:

[ HI-15530.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
HI-155305V / 3.3V Manchester Encoder / DecoderHOLTIC
HOLTIC

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск