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PDF 8732-01 Data sheet ( Hoja de datos )
| Número de pieza | 8732-01 | |
| Descripción | Low Skew 3.3V LVPECL Clock Generator | |
| Fabricantes | IDT | |
| Logotipo |  |
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Low Voltage, Low Skew
3.3V LVPECL Clock Generator
8732-01
Data Sheet
GENERAL DESCRIPTION
The 8732-01 is a low voltage, low skew, 3.3V LVPECL Clock
Generator. The 8732-01 has two selectable clock inputs. The
CLK0, nCLK0 pair can accept most standard differential input
levels.The single ended clock input accepts LVCMOS or LVTTL
input levels. The 8732-01 has a fully integrated PLL along with
frequency configurable outputs. An external feedbackinput and
outputs regenerate clocks with “zero delay”.
The 8732-01 has multiple divide select pins for each bank of
outputs along with 3 independent feedback divide select pins
allowing the 8732-01 to function both as a frequency multiplier
and divider. The PLL_SEL input can be usedto bypass the
PLL for test and system debug purposes.In bypass mode,
the input clock is routed around the PLLand into the internal
output dividers.
Features
• Ten differential 3.3V LVPECL outputs
• Selectable differential CLK0, nCLK0 or
LVCMOS/LVTTL CLK1 inputs
• CLK0, nCLK0 supports the following input types:
LVPECL, LVDS, LVHSTL, SSTL, HCSL
• CLK1 accepts the following input levels:
LVCMOS or LVTTL
• Maximum output frequency: 350MHz
• VCO range: 250MHz to 700MHz
• External feedback for “zero delay” clock regeneration
with configurable frequencies
• Cycle-to-cycle jitter: CLK0, nCLK0, 50ps (maximum)
CLK1, 80ps (maximum)
• Output skew: 150ps (maximum)
• Static phase offset: -150ps to 150ps
• Lead-Free package fully RoHS compliant
BLOCK DIAGRAM
PIN ASSIGNMENT
VCCO
QA0
52 51 50 49 48 47 46 45 44 43 42 41 40
1 39
2 38
VCCO
nQB3
nQA1
VEE
PLL_SEL
VCCO
nQA2
QA3
nQA3
VEE
5 35
6 34
7
ICS8732-01
33
31
10 30
11 29
12 28
13 27
14 15 16 17 18 19 20 21 22 23 24 25 26
QB2
VEE
MR
VCCO
QB1
nQB0
QB0
VEE
52-Lead LQFP
10mm x 10mm x 1.4mm package body
Y package
Top View
©2016 Integrated Device Technology, Inc
1
Revision E January 22, 2016
1 page  
8732-01 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCC
Inputs, VI
Outputs, IO
Continuous Current
Surge Current
4.6V
-0.5V to VCC + 0.5 V
50mA
100mA
Package Thermal Impedance, θJA 42.3°C/W (0 lfpm)
Storage Temperature, TSTG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions
beyond those listed in the DC Characteristics or AC Charac-
teristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 5A. POWER SUPPLY DC CHARACTERISTICS,
V
CC
=
V
CCA
=
V
CCO
=
3.3V±5%,
TA
=
0°C
TO
70°C
Symbol Parameter
Test Conditions
Minimum Typical
VCC
VCCA
VCCO
ICC
ICCA
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
3.135
3.135
3.135
3.3
3.3
3.3
Maximum
3.465
3.465
3.465
165
15
Units
V
V
V
mA
mA
TABLE
5B. LVCMOS/LVTTL
DC CHARACTERISTICS,
V
CC
=
V
CCA
=
V
CCO
=
3.3V±5%,
TA
=
0°C
TO
70°C
Symbol Parameter
Test Conditions Minimum Typical
CLK1
2
VIH
Input High Voltage CLK_SEL, PLL_SEL,
DIV_SELAx, DIV_SELBx,
FBDIV_SELx, MR
2
CLK1
-0.3
VIL
Input Low Voltage CLK_SEL, PLL_SEL,
DIV_SELAx, DIV_SELBx,
FBDIV_SELx, MR
-0.3
CLK_SEL, MR, CLK1
IIH
DIV_SELAx, DIV_SELBx,
Input High Current FBDIV_SELx
VCC = VIN = 3.465V
PLL_SEL
VCC = VIN = 3.465V
IIL
Input Low Current
CLK_SEL, MR, CLK1
DIV_SELAx, DIV_SELBx,
FBDIV_SELx
VCC = 3.465V,
VIN = 0V
-5
PLL_SEL
VCC = 3.465V,
VIN = 0V
-150
Maximum
VCC+ 0.3
VCC+ 0.3
1.3
0.8
150
5
Units
V
V
V
V
µA
µA
µA
µA
©2016 Integrated Device Technology, Inc
5
Revision E January 22, 2016
5 Page 
8732-01 Data Sheet
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the 8732-01.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 8732-01 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results.
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
• Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 165mA = 572mW
• Power (outputs)MAX = 30mW/Loaded Output pair
If all outputs are loaded, the total power is 10 * 30mW = 300mW
Total Power_MAX (3.465V, with all outputs switching) = 572mW + 300mW = 872mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of
the device. The maximum recommended junction temperature for the devices is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θJA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
TA = Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θJA must be used. Assuming
a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 36.4°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
70°C + 0.872W * 36.4°C/W = 101.7°C. This is well below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
TABLE 8. THERMAL RESISTANCE θJA FOR 52-PIN LQFP, FORCED CONVECTION
θJA by Velocity (Linear Feet per Minute)
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
58.0°C/W
42.3°C/W
200
47.1°C/W
36.4°C/W
500
42.0°C/W
34.0°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
©2016 Integrated Device Technology, Inc
11
Revision E January 22, 2016
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet 8732-01.PDF ] | |
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