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853S011B PDF даташит

Спецификация 853S011B изготовлена ​​​​«IDT» и имеет функцию, называемую «LVPECL/ ECL Fanout Buffer».

Детали детали

Номер произв 853S011B
Описание LVPECL/ ECL Fanout Buffer
Производители IDT
логотип IDT логотип 

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853S011B Даташит, Описание, Даташиты
Low Skew, 1-to-2, Differential-to-2.5V, 3.3V
LVPECL/ ECL Fanout Buffer
853S011B
Datasheet
General Description
The 853S011B is a low skew, high performance 1-to-2
Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The
853S011B is characterized to operate from either a 2.5V or a 3.3V
power supply. Guaranteed output and part-to-part skew
characteristics make the 853S011B ideal for those clock distribution
applications demanding well defined performance and repeatability.
Features
Two differential 2.5V, 3.3V LVPECL/ECL outputs
One differential PCLK, nPCLK input pair
PCLK, nPCLK pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
Maximum output frequency: >2.5GHz
Translates any single-ended input signal to 3.3V LVPECL levels
with resistor bias on nPCLK input
Output skew: 5ps (typical)
Part-to-part skew: 130ps (maximum)
Propagation delay: 355ps (maximum)
LVPECL mode operating voltage supply range:
VCC = 2.375V to 3.8V, VEE = 0V
ECL mode operating voltage supply range:
VCC = 0V, VEE = -3.8V to -2.375V
-40°C to 85°C ambient operating temperature
Available lead-free (RoHS 6) package
Block Diagram
PCLK Pulldown
nPCLK Pullup/Pulldown
Q0
nQ0
Q1
nQ1
©2016 Integrated Device Technology, Inc.
Pin Assignment
Q0 1
nQ0 2
Q1 3
nQ1 4
8 VCC
7 PCLK
6 nPCLK
5 VEE
853S011B
8-Lead SOIC, 150MIL
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
8-Lead TSSOP, 118MIL
3.0mm x 3.0mm x 0.97mm package body
G Package
Top View
1 Revision B, February 23, 2016









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853S011B Даташит, Описание, Даташиты
853S011B Datasheet
Pin Description and Pin Characteristic Tables
Table 1. Pin Descriptions
Number
Name
Type
Description
1, 2
Q0, nQ0
Output
Differential output pair. LVPECL/ECL interface levels.
3, 4
Q1, nQ1
Output
Differential output pair. LVPECL/ECL interface levels.
5 VEE Power
Negative supply pin.
6
nPCLK
Input
Pullup/
Pulldown
Inverting differential LVPECL clock input. VCC/2 default when left floating.
7
PCLK
Input
Pulldown Non-inverting differential LVPECL clock input.
8 VCC Power
Positive supply pin.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Symbol
Parameter
RPULLDOWN
RVCC/2
Input Pulldown Resistor
RPullup/Pulldown Resistors
Test Conditions
Minimum
Typical
75
50
Maximum
Units
k
k
©2016 Integrated Device Technology, Inc.
2
Revision B, February 23, 2016









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853S011B Даташит, Описание, Даташиты
853S011B Datasheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, VCC
Negative Supply Voltage, VEE
Inputs, VI (LVPECL mode)
Inputs, VI (ECL mode)
Outputs, IO
Continuous Current
Surge Current
Operating Temperature Range, TA
Package Thermal Impedance, JA
(Junction-to-Ambient) for 8 Lead SOIC
Package Thermal Impedance, JA
(Junction-to-Ambient) for 8 Lead TSSOP
Storage Temperature, TSTG
Rating
4.6V (LVPECL mode, VEE = 0V)
-4.6V (ECL mode, VCC = 0V)
-0.5V to VCC + 0.5V
0.5V to VEE – 0.5V
50mA
100mA
-40C to +85C
102C/W (0 mps)
145.4C/W (0 mps)
-65C to 150C
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics, VCC = VCCO = 2.375V to 3.8V; VEE = 0V, TA = -40°C to 85°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
VCC Positive Supply Voltage
IEE Power Supply Current
2.375
3.3
3.8
25
Units
V
mA
©2016 Integrated Device Technology, Inc.
3
Revision B, February 23, 2016










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