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PDF BU97550KV-M Data sheet ( Hoja de datos )
| Número de pieza | BU97550KV-M | |
| Descripción | Multi-function LCD Segment Drivers | |
| Fabricantes | ROHM Semiconductor | |
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Datasheet
LCD Segment Drivers
Multi-function LCD Segment Drivers
BU97550KV-M
MAX 528 Segment(66SEGx8COM)
General Description
The BU97550KV-M is 1/8, 1/7, 1/5, 1/4, 1/3, or 1/1 duty
general-purpose LCD driver that can be used for
frequency display in electronic tuners under the control of
a microcontroller. The BU97550KV-M can drive up to 528
LCD Segments directly. The BU97550KV-M can also
control up to 9 general-purpose output ports.
These products also incorporate a key scan circuit that
accepts input from up to 30 keys to reduce printed circuit
board wiring
Features
AEC-Q100 Qualified (Note)
Key input function for up to 30 keys (A key scan is
performed only when a key is pressed.)
Either 1/8, 1/7, 1/5, 1/4, 1/3 or 1/1 duty (static)
can be selected with the serial control data.
1/8 duty drive: Up to 528 segments can be driven
1/7 duty drive: Up to 469 segments can be driven
1/5 duty drive: Up to 345 segments can be driven
1/4 duty drive: Up to 280 segments can be driven
1/3 duty drive: Up to 210 segments can be driven
1/1 duty drive: Up to 70 segments can be driven
Serial Data Control of frame frequency for common
and segment output waveforms.
Serial data control of switching between the segment
output port , PWM output port and general-purpose
output port functions.(Max 9 ports)
Built-in OSC circuit
Integrated Power-on Reset Circuit
No external component
Low power consumption design
Supports Line and Frame Inversion
(Note) Grade 3
Applications
Car Audio, Home Electrical Appliance,
Meter Equipment etc.
Key Specifications
■ Supply Voltage Range:
+2.7V to +6.0V
■ Operating Temperature Range: -40°C to +85°C
■ Max Segments:
528 Segments
■ Display Duty 1/1, 1/3, 1/4, 1/5, 1/7, 1/8 Selectable
■ Bias:
1/1, 1/2, 1/3, 1/4 Selectable
■ Interface:
3wire Serial Interface
Package
W (Typ.) x D (Typ.) x H (Max.)
VQFP80
14.00mm x 14.00mm x 1.60mm
Typical Application Circuit
Key Matrix
+5V
(Note2)
KS1 / S53
KS6 / S58
VDD
KI1 / S59
KI5 / S63
COM1
COM2
COM3
COM4
COM5/S67
COM6/S66
COM7/S65
COM8/S64
P1/G1
P9/G9
(General Purpose/PWM Ports)
(For control of backlight)
From Control
To Control
SCE
SCL
SDI
SDO
S1/P1/G1
S9/P9/G9
S10
LCD Panel
(Up to 528 Segments)
(Note2) Insert capacitors
between VDD and VSS C≥0.1uF
S52
S68
S69
OSC_IN/S70
Figure 1. Typical Application Circuit
○Product structure：Silicon monolithic integrated circuit
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This product is not designed protection against radioactive rays.
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09.Jul.2015 Rev.002
1 page  
BU97550KV-M
MPU Interface Characteristics (Ta=-40 to +85°C, VDD = 2.7V to 6.0V, VSS=0V)
Parameter
Symbol
Pin
Conditions
Limit
Min Typ
Data Setup Time
tds SCL, SDI
120 -
Data Hold Time
tdh SCL, SDI
120 -
SCE Wait Time
tcp SCE, SCL
120 -
SCE Setup Time
tcs SCE, SCL
120 -
SCE Hold Time
tch SCE, SCL
120 -
Clock Cycle Time
tccyc SCL
320 -
High-level Clock Pulse
Width
tchw SCL
120 -
Low-level Clock Pulse
Width (Write)
tclww SCL
120 -
Low-level Clock Pulse
Width (Read)
tclwr SCL
RPU=4.7KΩ
CL=10pf(Note5)
1.6 -
Rise Time
tr SCE, SCL, SDI
- 160
Fall Time
tf SCE, SCL, SDI
- 160
SDO Output Delay
Time
tdc SDO
RPU=4.7KΩ
CL=10pf(Note5)
--
SDO Rise Time
Tdr SDO
RPU=4.7KΩ
CL=10pf(Note5)
--
(Note5) Since SDO is an open-drain output, ”tdc” and “tdr” depend on the resistance of the pull-up resistor RPU and the load capacitance SCL.
RPU: 1kΩ≤RPU≤10kΩ is recommended.
CL: A parasitic capacitance to VSS in an application circuit. Any component is not necessary to be attached.
Power supply for I/O level
Max
-
-
-
-
-
-
-
-
-
-
-
1.5
1.5
SDO
RPU Host
CL
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
µs
µs
1. When SCL is stopped at the low level
SCE
SCL
SDI
VIH1
VIL1
tr
tccyc
tchw
tclww
tf
VIH1
VIL1
VIH1
tcs
tclwr
VIL1
tch
SDO
tds tdh
VOL5
tdc
tdr
2. When SCL is stopped at the high level
SCE
SCL
SDI
VIH1
VIL1
tf
tccyc
tclww
tchw
tr
VIH1
VIL1
tds tdh
VIH1
tcp
tclwr
VIL1
tch
SDO
VOL5
tdc
Figure 5.Serial Interface Timing
tdr
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/69
TSZ02201-0P4P0D300980-1-2
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BU97550KV-M
(2) When SCL is stopped at the high level
SCE
SCL
SDI 1 0 0 1 0 0 1 0 D1 D2 D3 D4 D5 D6 D7 D8 --- D90 D91 D92 D93 D94 D95 D96 0 --- 0 DR0 DR1 DT0 DT1 DT2 KM0 KM1 KM2 P0 P1 P2 P3 FL FC0 FC1 FC2 FC3 OC SC BU0 BU1 BU2 0 0 0
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1 0 0 1 0 0 1 0 D97 D98 D99 D100 D101 D102 D103 D104 --- D186 D187 D188 D189 D190 D191 D192 0 0 --- 0 0 0 0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 0 PF0 PF1 PF2 PF3 CT0 CT1 CT2 CT3 0 0 1
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1 0 0 1 0 0 1 0 D193 D194 D195 D196 D197 D198 D200 D201 --- D282 D283 D284 D285 D286 D287 D288 0 0 --- 0 0 WN10 WN11 --- WN17 WN18 WN20 WN21 --- WN27 WN28 WN30 WN31 --- WN37 WN38 WN40 WN41 --- WN47 WN48 0 1 0
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1 0 0 1 0 0 1 0 D289 D230 D231 D232 D233 D234 D235 D236 --- D378 D379 D380 D381 D382 D383 D384 WN50 WN51 --- WN57 WN58 WN60 WN61 --- WN67 WN68 WN70 WN71 --- WN77 WN78 WN80 WN81 --- WN87 WN88 WN90 WN91 --- WN97 WN98 0 1 1
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1 0 0 1 0 0 1 0 D385 D386 D387 D388 D389 D390 D391 --- D463 D465 D467 D468 D469 0 --- 0 0 0 0 0 0 0 0 0 0 0 0 0 --- 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
SCE
SCL
SDI 1 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 --- 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 --- 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
Device Code
8 bits
Display Data
96 bits
Control Data
53 bits
DD
3 bits
(Note9)
Figure 10. 3-SPI Data Transfer Format
(Note9) DD is direction data.
・Device code････････････････････”49H”
・KM0 to KM2･････････････････････Key Scan output port/Segment output port switching control data
・D1 to D469･･････････････････････Display data
・P0 to P3････････････････････････Segment output port/general-purpose output port switching control data
・FL･････････････････････････････Line Inversion or Frame Inversion switching control data
・DR0 to DR1･･････････････････････1/4 bias driver, 1/3 bias driver or 1/2 bias driver switching control data
・DT0 to DT2･･････････････････････1/8-duty drive 1/7-duty drive ,1/5-duty drive, 1/4-duty drive, 1/3-duty drive
or 1/1-duty(static) drive switching control data
・FC0 to FC3･････････････････････Common/segment output waveform frame frequency setting control data
・OC･･･････････････････････････ Internal oscillator operating mode/External clock operating mode switching control data
・SC････････････････････････････Segment on/off control data
・BU0 to BU2･････････････････････Normal mode/power-saving mode control data
・PG1 to PG9････････････････････ PWM/General Purpose output select data
・PF0 to PF3･････････････････････PWM output waveform frame frequency setting control data.
・CT0 to CT3･････････････････････LCD bias voltage VLCD setting control data.
・W10 to W18, W20 to W28, W30 to W38,W40 to W48, W50 to W58, W60 to W68, W70 to W78, W80 to W88, W90 to W98
･･････････････････････････････････PWM output duty setting control data
www.rohm.com
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
11/69
TSZ02201-0P4P0D300980-1-2
09.Jul.2015 Rev.002
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet BU97550KV-M.PDF ] | |
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