|
|
PDF BU8255KVT Data sheet ( Hoja de datos )
| Número de pieza | BU8255KVT | |
| Descripción | 35bit LVDS Receiver | |
| Fabricantes | ROHM Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de BU8255KVT (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
LVDS Interface ICs
35bit LVDS Receiver
5:35 DeSerializer
BU8255KVT
●Description
LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and
number of bits range is from 35 to 70. Data is transmitted seven times (7X) stream and reduce cable number
by 3(1/3) or less. The ROHM's LVDS has low swing mode to be able to expect further low EMI.
●Features
■Five channels of LVDS data stream are converted to 35bits data of parallel LVCMOS level outputs.
■30bits of RGB output data, 5bits of timing and control output data(HSYNC, VSYNC, DE, CTL1 and CTL2)
are transmitted available.
■Support clock frequency from 8MHz up to 112MHz.
■Support consumer video format including 480i, 480P, 720P and 1080i as well.
■Support many kinds of PC video formats such as VGA, SVGA, XGA and SXGA.
■Provide 784Mbps per 1ch or 3.92Gbps per device throughput rate using 112MHz clock rate.
■User programmable LVCMOS data output triggering timing by using either rising or falling edge of clock.
■30bit LVDS transmitter is recommended to use BU8254KVT.
●Applications
Flat Panel Display
◇Precaution
･This chip is not designed to protect from radioactivity.
･The chip is made strictly for the specific application or equipment.
Then it is necessary that the unit is measured as need.
･This document may be used as strategic technical data which subjects to COCOM regulations.
Status of this document
The Japanese version of this document is the formal specification.
A customer may use this translation version only for a reference to help reading the formal version.
If there are any differences in translation version of this document, formal version takes priority.
Jun.2008
1 page  
●Pin Description
Table .1: Pin description
Pin Name Pin No.
RA+, RA-
50,49
RB+, RB-
52,51
RC+, RC-
55,54
RD+, RD-
60,59
RE+, RE-
RCLK+,
RCLK-
RA6～RA0
RB6～RB0
RC6～RC0
RD6～RD0
RE6～RE0
RESERVE
62,61
57,56
40,41,42,43,
45,46,47
32,33,34,35,
36,38,39
22,24,25,26,
27,28,29
14,15,17,18,
19,20,21
6,7,8,10,11,1
2,13
2
PD 3
OE 4
R/F 5
VDD
CLKOUT
GND
LVDD
LGND
PVDD
PGND
9,23,37,48
31
1,16,30,44
53
58
64
63
I/O
LVDS Input
LVDS Input
LVDS Input
LVDS Input
LVDS Input
LVDS Input
Output
Output
Output
Output
Output
Input
Input
Input
Input
Power
Output
Ground
Power
Ground
Power
Ground
Description
LVDS data input
+ : Positive input of LVDS data differential pair.
- : Negative input of LVDS data differential pair.
LVDS clock input
LVCMOS data outputs.
Reserved input, must be “Low” for normal operation.
Power down input for the internal system.
H: Normal operation.
L: Power down (All output are “Low”).
Power down input for the data output driver.
H: Output enable (Normal operation).
L: Output disable(All outputs are “Hi-Z”).
Select input pin for data output clock triggering edge.
H: Output data is latched on rising edge.
L: Output data is latched on falling edge.
3.3V output driver and digital core power supply pin.
LVCMOS level clock output.
GND pin for both data output driver cells and the digital
cores.
Power supply pin for LVDS inputs.
Ground pin for LVDS inputs.
Power supply pin for PLL core.
Ground pin for PLL core.
5 / 17
5 Page 
●AC Timing Diagrams
■LVCMOS
LVCMOS output
CL=8pF
80%
20%
80%
20%
LVCMOS output load
tTLH
tTHL
CLKOUT
Rxn
x=A,B,C,D,E
n=0,1,2,3,4,5,6
VDD/2
tRCP
VDD/2
tRCH
VDD/2
tRS
tRCL
VDD/2
R/F=L
VDD/2
R/F=H
tRH
VDD/2
Figure–6 LVCMOS output timing
■Phase-Locked Loop set time
VDD
3.0V
RCLK +/-
PD
VDD/2
CLKOUT
tRPLL
VDD/2
Figure–7 Phase-Locked Loop set time
11 / 17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet BU8255KVT.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| BU8255KVT | 35bit LVDS Receiver | ROHM Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |