|
|
PDF MC74HC4060A Data sheet ( Hoja de datos )
| Número de pieza | MC74HC4060A | |
| Descripción | 14-Stage Binary Ripple Counter | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MC74HC4060A (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
|
No Preview Available !
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
14-Stage Binary Ripple
Counter With Oscillator
High–Performance Silicon–Gate CMOS
The MC54/74C4060A is identical in pinout to the standard CMOS
MC14060B. The device inputs are compatible with standard CMOS out-
puts; with pullup resistors, they are compatible with LSTTL outputs.
This device consists of 14 master–slave flip–flops and an oscillator
with a frequency that is controlled either by a crystal or by an RC circuit
connected externally. The output of each flip–flop feeds the next and the
frequency at each output is half of that of the preceding one. The state of
the counter advances on the negative–going edge of the Osc In. The
active–high Reset is asynchronous and disables the oscillator to allow
very low power consumption during stand–by operation.
State changes of the Q outputs do not occur simultaneously because
of internal ripple delays. Therefore, decoded output signals are subject to
decoding spikes and may have to be gated with Osc Out 2 of the
HC4060A.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With JEDEC Standard No. 7A Requirements
• Chip Complexity: 390 FETs or 97.5 Equivalent Gates
LOGIC DIAGRAM
Osc Out 1 Osc Out 2
10 9
Osc In 11
Reset 12
7 Q4
5 Q5
4 Q6
6 Q7
14 Q8
13 Q9
15 Q10
1 Q12
2 Q13
3 Q14
Pin 16 = VCC
Pin 8 = GND
MC54/74HC4060A
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
16
1
D SUFFIX
SOIC PACKAGE
CASE 751B–05
16
1
DT SUFFIX
TSSOP PACKAGE
CASE 748C–03
ORDERING INFORMATION
MC54HCXXXXAJ
MC74HCXXXXAN
MC74HCXXXXAD
MC74HCXXXXADT
Ceramic
Plastic
SOIC
TSSOP
Clock
X
FUNCTION TABLE
Reset
L
L
H
Output State
No Charge
Advance to Next State
All Outputs Are Low
Pinout: 16–Lead Plastic Package (Top View)
VCC Q10 Q8
16 15 14
Osc Osc
Q9 Reset Osc In Out 1 Out 2
13 12 11 10 9
12345678
Q12 Q13 Q14 Q6 Q5 Q7 Q4 GND
3/96
©10M/9o5torola, Inc. 1996
© Motorola, Inc. 1995
3–1 REV 1
3–1 REV 6
1 page  
MC54/74HC4060A
PIN DESCRIPTIONS
INPUTS
Osc In (Pin 11)
Negative–edge triggering clock input. A high–to–low tran-
sition on this input advances the state of the counter. Osc In
may be driven by an external clock source.
Reset (Pin 12)
Active–high reset. A high level applied to this input asynch-
ronously resets the counter to its zero state (forcing all Q out-
puts low) and disables the oscillator.
OUTPUTS
Q4—Q10, Q12–Q14 (Pins 7, 5, 4, 6, 13, 15, 1, 2, 3)
Active–high outputs. Each Qn output divides the Clock
input frequency by 2N. The user should note the Q1, Q2, Q3
and Q11 are not available as outputs.
Osc Out 1, Osc Out 2 (Pins 9, 10)
Oscillator outputs. These pins are used in conjunction with
Osc In and the external components to form an oscillator
(See NO TAG and NO TAG). When Osc In is being driven
with an external clock source, Osc Out 1 and Osc Out 2 must
be left open circuited. With the crystal oscillator configuration
in Figure 6, Osc Out 2 must be left open circuited.
SWITCHING WAVEFORMS
Osc In
Q
tf tr
90%
50%
10%
tw
tPLH
1/fMAX
90%
50%
10%
tTLH
tPHL
tTHL
VCC
GND
Reset
Q
tPHL
Osc In
tw
50%
50%
Figure 1.
Figure 2.
VCC
GND
trec
VCC
50%
GND
Qn
Qn+1
50%
tPLH
50%
tPHL
Figure 3.
VCC
GND
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 4. Test Circuit
High–Speed CMOS Logic Data
DL129 — Rev 6
3–5
MOTOROLA
5 Page 
OUTLINE DIMENSIONS
DT SUFFIX
TSSOP PACKAGE
CASE 948C–03
ISSUE B
A
–P–
16x K REF
0.200 (0.008) M T
16 9
PIN 1
IDENTIFICATION
L
1
B
8
C
0.100 (0.004) M
–T– SEATING
PLANE
DG
K
K1
J1
J
SECTION A–A
H
A
A
F
M
MC54/74HC4060A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED 0.25 (0.010)
PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSIONS A AND B ARE TO BE DETERMINED
AT DATUM PLANE –U–.
–U–
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A ––– 5.10 ––– 0.200
B 4.30 4.50 0.169 0.177
C ––– 1.20 ––– 0047
D 0.05 0.25 0.002 0.010
F 0.45 0.55 0.018 0.022
G 0.65 BSC
0.026 BSC
H 0.22 0.23 0.009 0.010
J 0.09 0.24 0.004 0.009
J1 0.09 0.18 0.004 0.007
K 0.16 0.32 0.006 0.013
K1 0.16 0.26 0.006 0.010
L 6.30 6.50 0.248 0.256
M 0 ° 10° 0 ° 10°
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki,
6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315
MFAX: [email protected] –TOUCHTONE (602) 244–6609
INTERNET: http://Design–NET.com
HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
High–Speed CMOS Logic Data
DL129 — Rev 6
◊ CODELINE
*MC54/74HC4060A/D*3–11
MC54/74HC4060A/D
MOTOROLA
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet MC74HC4060A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MC74HC4060 | 14-Stage Binary Ripple Counter | Motorola Semiconductors |
| MC74HC4060A | 14-Stage Binary Ripple Counter | Motorola Semiconductors |
| MC74HC4060A | 14-Stage Binary Ripple Counter |  ON Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |