74HC08D PDF даташит
Спецификация 74HC08D изготовлена «Toshiba» и имеет функцию, называемую «high speed CMOS 2-INPUT AND GATE». |
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Детали детали
Номер произв | 74HC08D |
Описание | high speed CMOS 2-INPUT AND GATE |
Производители | Toshiba |
логотип |
8 Pages
No Preview Available ! |
CMOS Digital Integrated Circuits Silicon Monolithic
74HC08D
74HC08D
1. Functional Description
• Quad 2-Input AND Gate
2. General
The 74HC08D is a high speed CMOS 2-INPUT AND GATE fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The internal circuit is composed of 2-stages including buffer output, which provide high noise immunity and
stable output.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
3. Features
(1) High speed: tpd = 6 ns (typ.) at VCC = 5 V
(2) Low power dissipation: ICC = 1.0 µA (max) at Ta = 25
(3) Balanced propagation delays: tPLH ≈ tPHL
(4) Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V
4. Packaging
SOIC14
©2016 Toshiba Corporation
1
Start of commercial production
2016-05
2016-08-04
Rev.4.0
No Preview Available ! |
5. Pin Assignment
6. Marking
7. IEC Logic Symbol
74HC08D
©2016 Toshiba Corporation
2
2016-08-04
Rev.4.0
No Preview Available ! |
8. Truth Table
74HC08D
ABY
LLL
LHL
HL L
HHH
9. Absolute Maximum Ratings (Note)
Characteristics
Symbol Note
Rating
Unit
Supply voltage
VCC
-0.5 to 7.0
V
Input voltage
VIN
-0.5 to VCC + 0.5
V
Output voltage
VOUT
-0.5 to VCC + 0.5
V
Input diode current
IIK ±20 mA
Output diode current IOK ±20 mA
Output current
IOUT
±25 mA
VCC/ground current
ICC ±50 mA
Power dissipation
PD (Note 1)
500
mW
Storage temperature
Tstg
-65 to 150
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: PD derates linearly with -8 mW/ above 85
10. Operating Ranges (Note)
Characteristics
Symbol
Test Condition
Rating
Supply voltage
VCC
2.0 to 6.0
Input voltage
VIN
0 to VCC
Output voltage
VOUT
0 to VCC
Operating temperature
Topr
-40 to 125
Input rise and fall times
tr,tf
0 to 50
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs and bus inputs must be tied to either VCC or GND.
Unit
V
V
V
µs
©2016 Toshiba Corporation
3
2016-08-04
Rev.4.0
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