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PDF CPC7593 Data sheet ( Hoja de datos )

Número de pieza CPC7593
Descripción Line Card Access Switch
Fabricantes IXYS 
Logotipo IXYS Logotipo



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No Preview Available ! CPC7593 Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS DIVISION
CPC7593
Line Card Access Switch
Features
TTL Logic Level Inputs for 3.3V Logic Interfaces
Smart Logic for Power Up / Hot Plug State Control
Improved Switch dV/dt Immunity of 500 V/s
Small 20-pin or 28-pin SOIC Packages
Monolithic IC Reliability
Low, Matched, RON
Eliminates the Need for Zero-cross Switching
Flexible Switch Timing for Transition from Ringing
Mode to Talk Mode.
Clean, Bounce-Free Switching
SLIC Tertiary Protection Via Integrated Current
Limiting, Voltage Clamping, and Thermal Shutdown
5V Operation with Power Consumption < 10.5 mW
Intelligent Battery Monitor
Logic-Level Inputs, no External Drive Circuitry
Required
Applications
Standard voice linecards
Integrated Voice and Data (IVD) linecards
Central office (CO)
Digital Loop Carrier (DLC)
PBX Systems
Digitally Added Main Line (DAML)
Hybrid Fiber Coax (HFC)
Fiber in the Loop (FITL)
Pair Gain System
Channel Banks
Description
The CPC7593 is a member of IXYS Integrated
Circuits Division’s next generation Line Card Access
Switch (LCAS) family. This monolithic 10-pole line
card access switch is available in 20-pin and 28-pin
SOIC packages. It provides the necessary functions to
replace three 2-Form-C electromechanical relays on
analog line cards or combined voice and data line
cards found in central office, access, and PBX
equipment. The device contains solid state switches
for tip and ring line break, ringing injection, and test
access. The CPC7593 requires only a +5 V supply
and provides stable start up conditioning during
system power up and for hot plug insertion
applications. Once active, the inputs respond to
traditional TTL logic levels enabling the CPC7593 to
be used with 3.3V only logic.
Ordering Information
CPC7593 part numbers are specified as shown here:
B - 28-pin SOIC delivered 29/Tube, 1000/Reel
Z - 20-pin SOIC delivered 40/Tube, 1000/Reel
CPC7593 x x xx
TR - Add for Tape & Reel Version
A - With Protection SCR
B - Without Protection SCR
C - With Protection SCR and with Extra Logic State
Pb e3
Figure 1. CPC7593 Block Diagram
T (T )TESTin
CHANTEST
Tip
Ring
T (T )TESTout
DROPTEST
T 7LINE
Secondary
Protection
RLINE 22
10 8 TRINGING
SW7
X
X SW5 X SW3
X
SW1
5
X SW9
SW2
X
X SW6 XSW4
X SW10
X
SW8
CPC7593
SCR
Trip
Circuit
+5 Vdc
12 VDD
6 TBAT
SLIC
23 RBAT
17
VREF
Switch
Control
L
A
T
16
15
Logic
C
H
18
INTESTin
INRINGING
INTESTout
LATCH
R (R )TESTout
DROPTEST
R (R )TESTin CHANTEST
19
20 RRINGING
24
300Ω (min.)
1
FGND
28
VBAT
14 13
DGND
TSD
VBAT
RINGING
NOTE 1: Pin assignments are for the 28 pin package.
NOTE 2: Block diagram shown with the optional protection SCR.
DS-CPC7593-R05
www.ixysic.com
1

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CPC7593 pdf
INTEGRATED CIRCUITS DIVISION
CPC7593
1.6 Switch Specifications
1.6.1 Break Switches, SW1 and SW2
Parameter
Off-State
Leakage Current
On Resistance
On Resistance
Matching
DC current limit
Dynamic current limit
(t 0.5 s)
Logic input to switch
output isolation
dV/dt sensitivity
Test Conditions
VSW1 (differential) = TLINE to TBAT
VSW2 (differential) = RLINE to RBAT
All-Off state.
+25° C,
VSW (differential) = -320 V to gnd
VSW (differential) = +260 V to -60 V
+85° C,
VSW (differential) = -330 V to gnd
VSW (differential) = +270 V to -60 V
-40° C,
VSW (differential) = -310 V to gnd
VSW (differential) = +250 V to -60 V
ISW(on) = ±10 mA, ±40 mA,
RBAT and TBAT = -2 V
+25° C
+85° C
-40° C
Per SW1 & SW2 On Resistance test
conditions.
VSW (on) = ±10 V
+25° C
+85° C
-40° C
Break switches on, all other switches
off. Apply ±1 kV 10x1000 s pulse with
appropriate protection in place.
Logic inputs = GND
+25° C, VSW (TLINE, RLINE) = ±320 V
+85° C, VSW (TLINE, RLINE) = ±330 V
-40° C, VSW (TLINE, RLINE) = ±310 V
100VPP Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
Symbol
ISW
RON
RON
ISW
ISW
ISW
-
Minimum
-
-
-
-
80
-
-
-
-
-
-
Typical
0.1
0.3
0.1
14.5
20.5
10.5
0.15
225
150
400
2.5
0.1
0.3
0.1
500
Maximum
1
-
28
-
0.8
-
425
-
1
-
Unit
A
mA
A
A
V/s
R05 www.ixysic.com
5

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CPC7593 arduino
INTEGRATED CIRCUITS DIVISION
CPC7593
1.6.7 TESTin Switches, SW9 and SW10
Parameter
Test Conditions
VSW9 (differential) = TTESTin to TBAT
VSW10 (differential) = RTESTin to RBAT
All-Off state.
+25° C,
VSW (differential) = -320 V to gnd
VSW (differential) = +260 V to -60 V
Off-state leakage current
+85° C,
VSW (differential) = -330 V to gnd
VSW (differential) =+270 V to -60 V
-40° C,
VSW (differential) = -310 V to gnd
VSW (differential) = +250 V to -60 V
ISW (on) = ±10 mA
On Resistance
+25° C
+85° C
-40° C
VSW (on) = ±10 V
DC current limit
+25° C
+85° C
-40° C
Logic inputs = GND
Logic input to switch
output isolation
+25°C, VSW (TTESTin, RTESTin)=±320V
+85°C, VSW (TTESTin, RTESTin)=±330V
-40°C, VSW (TTESTin, RTESTin)=±310V
dV/dt sensitivity
100VPP Square Wave, 100Hz
(Not production tested - limits are
guaranteed by design and quality
control sampling audits.)
Symbol
ISW
RON
ISW
ISW
-
Minimum
-
-
-
80
-
-
Typical
0.1
0.3
0.1
35
50
26
160
110
210
0.1
0.3
0.1
500
Maximum
1
-
70
-
-
-
250
1
-
Unit
A
mA
A
V/s
R05 www.ixysic.com
11

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