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Número de pieza | CPC75282 | |
Descripción | Line Card Access Switch | |
Fabricantes | IXYS | |
Logotipo | ||
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No Preview Available ! CPC75282
INTEGRATED CIRCUITS DIVISION
PRELIMINARY
Line Card Access Switch
Features
• Improved Switch dV/dt Immunity of 1500V/s
• Smart logic for power-up/hot-plug state control
• Small 44-pin TQFP Package
• Monolithic IC reliability
• Low, matched RON
• Eliminates the need for zero-cross switching
• Flexible switch timing to transition from ringing mode
to talk mode.
• Clean, bounce-free switching
• Tertiary protection consisting of integrated current
limiting, voltage clamping, and thermal shutdown for
SLIC protection
• 5V operation with very low power consumption
• Intelligent battery monitor
• Latched logic-level inputs, no external drive circuitry
required
Description
The CPC75282 Dual Line Card Access Switch
(LCAS), a member of IXYS Integrated Circuits
Division’s next generation Line Card Access Switch
family, is a monolithic solid state device that provides
the switching functionality of four 2-Form-C relays in a
single, small, economical package.
The CPC75282 Dual LCAS device is designed to
provide ringing and test access to the telephone loop
in Central Office, Digitally Added Main Line, Private
Branch Exchange, Digital Loop Carrier, and Hybrid
Fiber Coax/Fiber-In-The-Loop analog line card
applications. Test access switches provide access to
the telephone loop for line (drop) test or message
waiting in the PBX application.
Ordering Information
Applications
• VoIP Gateways
• Central Office (CO)
• Digital Loop Carrier (DLC)
• PBX Systems
• Digitally Added Main Line (DAML)
• Hybrid Fiber Coax (HFC)
• Fiber In The Loop (FITL)
• Pair Gain System
• Channel Banks
Part #
CPC75282KA
CPC75282KATR
Description
44-Pin TQFP, (37/Tube)
44-Pin TQFP, Tape & Reel (1000/Reel)
Pb e3
Figure 1. CPC75282 Block Diagram
TTEST1 37
TRINGING1 38
SW3 X
TLINE1 36
RLINE1 34
SW4 X
RRINGING1 30
RTEST1 33
X SW5
X
SW1
SW2
X
X SW6
1/2 - CPC75282
(Channel 1)
VDD
9,25
Battery
Monitor
CH1
CH2
Switch
Control
Logic
L
A
T
C
H
21 TBAT1
22 RBAT1
14 P1
15 P2
16 P3
17 LATCH1
18 LATCH2
28 TSD1
6 TSD2
19 OFF1
20 OFF2
27
FGND1
8,26
VBAT
24
CFG
11,23
DGND
DS-CPC75282-R00E
PRELIMINARY
1
1 page INTEGRATED CIRCUITS DIVISION
1.7 Switch Specifications
PRELIMINARY
1.7.1 Break Switches, SW1 and SW2
Parameter
Test Conditions
Symbol
VSW1 (differential) = TLINE to TBAT
VSW2 (differential) = RLINE to RBAT
All-Off state.
Off-State
Leakage Current
+25C,
VSW (differential) = -320V to gnd
VSW (differential) = +260V to -60V
+85 C,
VSW (differential) = -330V to gnd
VSW (differential) = +270V to -60V
ISW
-40C,
VSW (differential) = -310V to gnd
VSW (differential) = +250V to -60V
ISW(on) = ±10mA, ±40mA,
RBAT and TBAT = -2V
On Resistance
+25C
+85C
-40C
RON
On Resistance
Matching
Per SW1 & SW2 On Resistance test
conditions.
RON
ON-State Voltage 1
Maximum Differential Voltage (Vmax)
Foldback Voltage Breakpoint 1 (V1)
VON
Foldback Voltage Breakpoint 2 (V2)
VSW (on) = ±10V, +25C
DC current limit 1 (ILIM1) VSW (on) = ±10V, +85C
ISW
VSW (on) = ±10V, -40C
DC current limit 2 (ILIM2)
ISW
Dynamic current limit
(t = <0.5 s)
Break switches on, all other switches
off. Apply ±1 kV 10x1000 s pulse with
appropriate protection in place.
ISW
+25 C, OFFx = 0,
VSW (TLINE, RLINE) = ±320V
Logic Input to Switch +85 C, OFFx = 0,
Output Isolation
VSW (TLINE, RLINE) = ±330V
ISW
-40 C, OFFx = 0,
VSW (TLINE, RLINE) = ±310V
Transient Immunity 2
dV/dt
1 Choice of secondary protector should ensure this rating is not exceeded.
2 Applied voltage is 100VP-P square wave at 100Hz.
Minimum
-
-
-
-
60
V1 + 0.5
-
80
-
1
-
-
-
-
1500
R00E
PRELIMINARY
Typical
-
14.5
-
10.5
0.02
-
-
-
300
-
2.5
-
-
-
2100
CPC75282
Maximum
Unit
1 A
-
31
-
1.0
320
-V
-
mA
425
-
-A
1 A
- V/s
5
5 Page INTEGRATED CIRCUITS DIVISION
1.11 Truth Tables
PRELIMINARY
CPC75282
1.11.1 Operating States: CFG=0
State
P3
P2
P1
OFFx1
Break
Switches
Ringing
Switches
Test
Switches
Idle/Talk
0 0 0 1 ON OFF OFF
Test
Ringing
0
0
1
1
OFF OFF
ON
0 1 0 1 OFF ON OFF
Test/Monitor
0
1
1
1 ON OFF ON
Idle/Talk
1 0 0 1 ON OFF OFF
Test/Monitor
1
0
1
1 ON OFF ON
Ringing
1 1 0 1 OFF ON OFF
Test Ringing
1
1
1
1
OFF ON
ON
All-Off
x x x 02 OFF OFF OFF
1 P1, P2, and P3 data input values are directed to a given channel when the respective LATCHx logic signal is set to “0.”
OFFx is a per-channel control.
2 A “0” on OFFx resets the CPC75282, the device will remain in the All-Off state until OFFx is returned to “1” and the next LATCHx signal is
applied.
3 CFG is fixed at DGND; if CFG switches states when VDD is applied, the change will be recognized by a given channel after a LATCH low
transition is applied to that channel.
1.11.2 Operating States: CFG=1
State
P3
P2
P1
OFFx1
Break
Switches
Ringing
Switches
Test
Switches
Idle/Talk
0 0 0 1 ON OFF OFF
Test
0
0
1
1
OFF OFF
ON
Ringing
All-Off
0 1 0 1 OFF ON OFF
0 1 1 1 OFF OFF OFF
Idle/Talk
1 0 0 1 ON OFF OFF
Test/Monitor
1
0
1
1 ON OFF ON
Ringing
1 1 0 1 OFF ON OFF
Test Ringing
1
1
1
1
OFF ON
ON
All-Off
x x x 02 OFF OFF OFF
1 P1, P2, and P3 data input values are directed to a given channel when the respective LATCHx logic signal is set to “0.”
OFFx is a per-channel control.
2 A “0” on OFFx resets the CPC75282, the device will remain in the All-Off state until OFFx is returned to “1” and the next LATCHx signal is
applied.
3 CFG is fixed at vDD; if CFG switches states when VDD is applied, the change will be recognized by a given channel after a LATCH low
transition is applied to that channel.
R00E
PRELIMINARY
11
11 Page |
Páginas | Total 19 Páginas | |
PDF Descargar | [ Datasheet CPC75282.PDF ] |
Número de pieza | Descripción | Fabricantes |
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