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PDF TTR011 Data sheet ( Hoja de datos )
| Número de pieza | TTR011 | |
| Descripción | 1K ROM MCU | |
| Fabricantes | TONTEK | |
| Logotipo |  |
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TONTEK DESIGN TECHNOLOGY LTD.
Title
TTR011 (1K ROM MCU)
Version 3.2
Preliminary
Page
1 of 41
TTR011
§ Features
◆ Tontek RISC 4-bit CPU core with 2-level stacks
◆ All instructions are one word length
◆ Most of instructions need one machine cycle (2 CPU clocks) except read table instruction RTB
◆ Advanced CMOS process
◆ 1Kx16 OTP ROM
◆ 56x4 SRAM
◆ Operating voltage: 2.0V~5.50V
◆ Two high-speed clock OSCH selectable: on-chip 910kHz oscillator, external RC oscillator
◆ One low-speed clock OSCL: on-chip 16kHz oscillator
◆ Power-on default is low speed mode
◆ Four operation modes
- STOP mode: CPU, OSCH and OSCL stop
- GREEN mode: CPU and OSCH stop; OSCL active for periodical ADC measure and wake-up
- Low power mode: OSCH stop, OSCL active for CPU and peripheral circuit
- Normal mode: Both OSCH and OSCL active, CPU clock from OSCH
◆ 11 I/O pins + 1 input
- PA, PB and PC can be configured as wake-up input pins
- PB and PC can be programmed as input pins with pull-high resistors
- Four input pins can be defined as external interrupt input pins
- Shared with 5 ADC input channels and 1 buzzer output
◆ 5-channel 4-bit ADC
◆ One time base timer
- In GREEN mode, its clock is from the overflow of timer/counter B and its overflow wake up
CPU from GREEN mode.
- In other mode, its clock is from OSCL
◆ Two 8-bit timer/counter
- One 8-bit timer/counter B with two sets of auto-preload data to generate periodic waveform
for buzzer function.
- In GREEN mode, the overflow of timer B will trigger ADC check procedure and increment of
time base timer 1.
- One 8-bit timer/counter C with auto reload function
2013/07/10
1 page  
TONTEK DESIGN TECHNOLOGY LTD.
Title
TTR011 (1K ROM MCU)
Version 3.2
Preliminary
Page
5 of 41
§ Absolute Maximum Ratings
ITEM
Operating Temperature
SYMBOL
Top
Storage Temperature
Tst
Supply Voltage
VDD
OTP Supply Voltage
VPP
Input Voltage
Vin
ESD(Human Body Mode)
ESD
Note: VSS symbolizes for system ground
RATING
-20℃ ~ +70℃
-50℃ ~ +125℃
VSS-0.3V ~ VSS+6.0V
VSS-0.3V ~ VSS+12.5V
VSS-0.3V ~ VDD+0.3V
>5kV
§ DC Characteristics
Parameter
Operating Voltage
Operating Current
GREEN mode Current
Input low voltage
Input high voltage
Sink Current of output
Source Current of output
Pull-high Resistor of PB
and PC
Symbol
VDD
Ind1
Ind3
Istb1
Istb2
VIL
VIH
IOL
IOH
RPH
Test Condition
OSCH generated by external
RC oscillator
OSCH generated by on-chip
910kHZ oscillator
Normal mode, no load,
VDD=3.0V, OSCH=3.64MHz
Normal mode, no load,
VDD=3.0V, OSCH=910kHz
ADC OFF, OSCH stop, OSCL
active, VDD=3.0V, no load
ADC measurement cycle
time=32ms,
OSCH stop, OSCL active,
VDD=3.0V, no load
Input Low Voltage
Input High Voltage
VDD=3.0V, VOL=0.6V
VDD=3.0V, VOH=2.4V
VDD=3.0V
§ AC Characteristics
Min.
2.0
2.0
Typ. Max. Unit
5.5 V
5.5 V
1.0 2.0
0.4 0.7
mA
0.8 1.2
uA
1.1 1.5
uA
0 0.2 VDD
0.8 1.0 VDD
24
mA
-4 -2 mA
50 100 150 KΩ
(ambient temperature is 25℃)
Parameter
High-speed clock OSCH
Frequency
System stable time after
power up
Wake up time
Test Condition
External RC oscillator
On-chip 910kHz oscillator
Stable time=(OSCL startup
time)+(1/OSCL)X256
Wake up time to low power mode
=(OSCL startup time)+(1/OSCL)X4
Wake up time to normal mode
=(OSCH startup time)+(1/OSCH)X4
Min.
400K
882k
Typ.
910K
17
Max.
4M
937k
Unit
Hz
ms
1 ms
1 ms
(VDD=3V, ambient temperature is 25℃)
2013/07/10
5 Page 
TONTEK DESIGN TECHNOLOGY LTD.
Title
TTR011 (1K ROM MCU)
Version 3.2
Preliminary
Page
11 of 41
◆ OSCILLATOR STABLE TIME (OST)
The system oscillator generates the system control timing for CPU core or peripheral
devices with fixed control phase, so the waveform of oscillator becomes sensitive to many
kinds of noise. The abnormal duty is especially fatal for CPU. Any switching of clock source
needs oscillation stable time (OST) to make sure the oscillation is stable and synchronized
with CPU timing phase.
The OST is 256’s RC16K clocks after power up. When waking up to normal mode, The
OST is 4’s OSCH clocks. When waking up to low power mode, the OST is 4’s RC16K (OSCL)
clock.
◆ Adjustment of OSCL (RC16KHz)
The OSCL is RC type oscillator. The resistance and capacitance of the built-in resistor
and capacitor will vary piece by piece at the wafers. Then the frequency of OSCL will vary as
the resistance and capacitance vary. When the chip is used in the hot or cold environment,
the frequency of OSCL will change as the temperature of environment. It will also change as
the power voltage of the chip is change. There is above 100% variation of the OSCL
frequency in the worst case.
This chip provides a way to correct the OSCL frequency. If on-chip 910KHz is used as
OSCH, it provides a 3% accurate oscillator to MCU. The user software can compare OSCL
with OSCH by the timer/counter B (TCPB) and C (TCPC). If the OSCL is slower than 16KHz,
decreasing Mod_RC16KH or Mod_RC16KL will speed up 16KHz. If the OSCL is faster than
16KHz, increasing Mod_RC16KH or Mod_RC16KL speed up 16KHz. Every 1 increment will
slow down about 1.5% of frequency at RC16KHz. Here is a simple method to adjust the
OSCL frequency:
Step 1: set TCPC condition – TCPCD = FFH
Step 2: set TCPB conditions – TCPBDH = FFH, TCPBDL = FFH
Step 3: enable TCPC at conditions – Input clock = RC16KHz, auto-reload
Step 4: enable TCPB at conditions – Input clock = Fcpu, auto-reload
Step 5: count 6 overflows from TCPB, and record how many of TCPCOV occur
Step 6: Compute the total count of RC16KHz – Read TCPC counter value and do 1’s
complement, and add 255 for every TCPCOV
Step 7: disable TCPB and TCPC
Step 8: if the total count < 54 , subtract 1 to M16K7~0 and go to Step 3
2013/07/10
11 Page | ||
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| PDF Descargar | [ Datasheet TTR011.PDF ] | |
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