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AD5669R Datasheet PDF Download - Analog Devices

Номер произв AD5669R
Описание (AD5629R / AD5669R) Octal / 12-/16-Bit / I2C / denseDACs
Производители Analog Devices
логотип Analog Devices логотип 
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AD5669R Даташит, Описание, Даташиты
Data Sheet
Octal, 12-/16-Bit, I2C, denseDACs
with 5 ppm/°C On-Chip Reference
AD5629R/AD5669R
FEATURES
Low power octal DACs
AD5629R: 12 bits
AD5669R: 16 bits
2.6 mm × 2.6 mm 16-ball WLCSP
4 mm × 4 mm 16-lead LFCSP and 16-lead TSSOP
On-chip 1.25 V/2.5 V, 5 ppm/°C reference
Power down to 400 nA at 5 V, 200 nA at 3 V
2.7 V to 5.5 V power supply
Guaranteed monotonic by design
Power-on reset to zero scale or midscale
3 power-down functions
Hardware LDACE and CLRE functions
A A AA
I2C-compatible serial interface supports standard (100 kHz)
and fast (400 kHz) modes
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
GENERAL DESCRIPTION
The AD5629R/AD5669R devices are low power, octal, 12-/16-
bit, buffered voltage-output DACs. All devices are guaranteed
monotonic by design.
The AD5629R/AD5669R have an on-chip reference with an
internal gain of 2. The AD5629R-1/AD5669R-1 have a 1.25 V,
5 ppm/°C reference, giving a full-scale output range of 2.5 V.
The AD5629R-2/AD5629R-3 and the AD5669R-2/AD5669R-3
have a 2.5 V 5 ppm/°C reference, giving a full-scale output range
of 5 V depending on the option selected. Devices with 1.25 V
reference selected operate from a single 2.7 V to 5.5 V supply.
Devices with 2.5 V reference selected operate from 4.5 V to 5.5 V.
The on-chip reference is off at power-up, allowing the use of an
external reference. The internal reference is enabled via a
software write.
SCL
SDA
A0
FUNCTIONAL BLOCK DIAGRAM
VDD
VREFIN/VREFOUT
AD5629R/AD5669R
LDAC
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
INPUT
REGISTER
DAC
REGISTER
1.25V/2.5V REF
BUFFER
STRING
DAC A
BUFFER
STRING
DAC B
BUFFER
STRING
DAC C
BUFFER
STRING
DAC D
BUFFER
STRING
DAC E
BUFFER
STRING
DAC F
BUFFER
STRING
DAC G
BUFFER
STRING
DAC H
POWER-ON RESET
POWER-DOWN LOGIC
VOUTA
VOUTB
VOUTC
VOUTD
VOUTE
VOUTF
VOUTG
VOUTH
LDAC CLR
Figure 1.
GND
The parts incorporate a power-on reset circuit to ensure that the
DAC output powers up to 0 V (AD5629R-1/AD5629R-2,
AD5669R-1/AD5669R-2) or midscale (AD5629R-3/AD5669R-3)
and remains powered up at this level until a valid write takes
place. The part contains a power-down feature that reduces the
current consumption of the device to 400 nA at 5 V and
provides software-selectable output loads while in power-down
mode for any or all DAC channels.
PRODUCT HIGHLIGHTS
1. Octal, 12-/16-bit DACs.
2. On-chip 1.25 V/2.5 V, 5 ppm/°C reference.
3. Available in 16-lead LFCSP and TSSOP, and 16-ball
WLCSP.
4. Power-on reset to 0 V or midscale.
5. Power-down capability. When powered down, the DAC
typically consumes 200 nA at 3 V and 400 nA at 5 V.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2010–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
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AD5669R Даташит, Описание, Даташиты
AD5629R/AD5669R
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AC Characteristics........................................................................ 6
I2C Timing Characteristics.......................................................... 7
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configuration and Function Descriptions........................... 10
Typical Performance Characteristics ........................................... 12
Terminology .................................................................................... 19
Theory of Operation ...................................................................... 21
Digital-to-Analog Converter (DAC) Section ......................... 21
REVISION HISTORY
2/13—Rev. A to Rev. B
Added 16-Ball WLCSP ....................................................... Universal
Changes to Features Section.............................................................1
Added Figure 5, Renumbered Sequentially .................................10
Moved Table 6 ..................................................................................11
Changes to Figure 25 and Figure 26..............................................15
Added Figure 58...............................................................................29
Changes to Ordering Guide ...........................................................30
12/10—Rev. 0 to Rev. A
Changes to Features, General Description, and Product
Highlights Sections........................................................................... 1
Changes to AD5629R Relative Accuracy Parameter, Reference
Output (1.25 V) Reference Input Range Parameter, and Reference
Output (2.5 V) Reference Input Range Parameter (Table 1) ...... 3
Data Sheet
Resistor String............................................................................. 21
Internal Reference ...................................................................... 21
Output Amplifier........................................................................ 22
Serial Interface ............................................................................ 22
Write Operation.......................................................................... 22
Read Operation........................................................................... 22
Input Shift Register .................................................................... 23
Multiple Byte Operation............................................................ 23
Internal Reference Register....................................................... 24
Power-On Reset.......................................................................... 24
Power-Down Modes .................................................................. 25
Clear Code Register ................................................................... 25
LDAC Function .......................................................................... 27
Power Supply Bypassing and Grounding................................ 27
Outline Dimensions ....................................................................... 28
Ordering Guide .......................................................................... 30
Changes to Relative Accuracy Parameter, Reference Tempco
Parameter (Table 2) ...........................................................................5
Changes to Output Voltage Settling Time Parameter (Table 3) ..6
Changes to Table 5.............................................................................9
Changes to CLR Pin Description (Table 6)................................. 10
Added Figure 32 and Figure 33 .................................................... 15
Added Figure 46 ............................................................................. 17
Changes to Internal Reference Section........................................ 20
Changes to Power-On Reset Section ........................................... 23
Changes to Clear Code Register Section..................................... 24
Updated Outline Dimensions....................................................... 27
Changes to Ordering Guide .......................................................... 28
10/10—Revision 0: Initial Version
Rev. B | Page 2 of 32
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AD5669R Даташит, Описание, Даташиты
Data Sheet
AD5629R/AD5669R
SPECIFICATIONS
VDD = 4.5 V to 5.5 V, RL = 2 kΩ to GND, CL = 200 pF to GND, VREFIN = VDD. All specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
STATIC PERFORMANCE 2
AD5629R
Resolution
Relative Accuracy
Differential Nonlinearity
AD5669R
Resolution
Relative Accuracy
Differential Nonlinearity
Zero-Code Error
Zero-Code Error Drift
Full-Scale Error
Gain Error
Gain Temperature Coefficient
Offset Error
DC Power Supply Rejection
Ratio
DC Crosstalk
(External Reference)
DC Crosstalk
(Internal Reference)
OUTPUT CHARACTERISTICS 3
Output Voltage Range
Capacitive Load Stability
DC Output Impedance
Short-Circuit Current
Power-Up Time
REFERENCE INPUTS
Reference Current
Reference Input Range
Reference Input Impedance
REFERENCE OUTPUT (1.25 V)
Output Voltage
Reference Input Range
Output Impedance
REFERENCE OUTPUT (2.5 V)
Output Voltage
Reference Input Range
Output Impedance
A Grade 1
B Grade1
Min Typ Max Min Typ Max Unit
Test Conditions/Comments
12 12 Bits
±0.5 ±4
±0.5 ±1 LSB
±0.25
±0.25 LSB
See Figure 6
Guaranteed monotonic by design
(see Figure 8)
16 16 Bits
±8 ±32
±8 ±16 LSB
See Figure 5
±1
±1 LSB
Guaranteed monotonic by design
(see Figure 7)
6 19
6 19 mV
All 0s loaded to DAC register (see Figure 18)
±2 ±2 µV/°C
−0.2 −1
−0.2 −1 % FSR All 1s loaded to DAC register (see Figure 19)
±1 ±1 % FSR
±2.5 ±2.5 ppm Of FSR/°C
±6 ±19
±6 ±19 mV
–80 –80 dB VDD ± 10%
10 10 µV Due to full-scale output change,
RL = 2 kΩ to GND or VDD
5 5 µV/mA Due to load current change
10 10 µV Due to powering down (per channel)
25 25 µV Due to full-scale output change,
RL = 2 kΩ to GND or VDD
10 10 µV/mA Due to load current change
0 VDD 0 VDD V
2 2 nF RL = ∞
10 10 nF RL = 2 kΩ
0.5 0.5 Ω
30 30 mA VDD = 5 V
4 4 µs Coming out of power-down mode, VDD = 5 V
40 50
40 50
µA
0 VDD 0 VDD V
14.6 14.6 kΩ
VREFIN = VDD = 5.5 V (per DAC channel)
1.247
±15
7.5
1.253
1.247
±5
±15
7.5
1.253
±15
µA
ppm/°C
kΩ
TA = 25°C
LFCSP, TSSOP
WLCSP
2.495
±15
7.5
2.505
2.495
±5
7.5
2.505
±10
µA
ppm/°C
kΩ
TA = 25°C
Rev. B | Page 3 of 32
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